AD5232 Analog Devices, AD5232 Datasheet - Page 8

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AD5232

Manufacturer Part Number
AD5232
Description
2-Channel/ 256-Position Digital Potentiometer
Manufacturer
Analog Devices
Datasheet

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SERIAL DATA INTERFACE
The AD5232 contains a 4-wire SPI-compatible digital interface
(SDI, SDO, CS, and CLK), and uses a 16-bit serial data word
loaded MSB first. The format of the SPI-compatible word is
shown in Table II. The chip select (CS) pin needs to be held
low until the complete data word is loaded into the SDI pin.
When CS returns high, the serial data word is decoded accord-
ing to the instructions in Table III. The Command Bits (Cx)
control the operation of the digital potentiometer. The Address
Bits (Ax) determine which register is activated. The Data Bits
(Dx) are the values that are loaded into the decoded register.
Table IV provides an address map of the EEMEM locations.
The last instruction executed prior to a period of no program-
ming activity should be the No Operation (NOP) instruction.
This will place the internal logic circuitry in a minimum power
dissipation state.
The equivalent serial data input and output logic is shown in
Figure 3. The open-drain output SDO is disabled whenever chip
select CS is logic high. The SPI interface can be used in two slave
modes CPHA = 1, CPOL = 1 and CPHA = 0, CPOL = 0.
CPHA and CPOL refer to the control bits, which dictate
SPI timing in these MicroConverters
ADuC812/ADuC824, M68HC11, and MC68HC16R1/916R1.
ESD protection of the digital inputs is shown in Figures 4a and 4b.
MicroConverter is a registered trademark of Analog Devices, Inc.
AD5232
CLK
Command bits are identified as Cx, address bits are Ax, and data bits are Dx. Command instruction codes are defined
in Table III.
SDI
CS
AD5232
LOGIC
PINS
COUNTER
MSB B14
C3
AD5232
COMMAND
VALID
C2
INPUTS
REGISTER
300
SERIAL
AND ADDRESS
B13
C1
PROCESSOR
PR
COMMAND
DECODE
AD5232
®
B12
C0
WP
and microprocessors:
GND
V
DD
B11
A3
Table II. 16-Bit Serial Data Word
SDO
GND
5V
R
B10
A2
PULLUP
B9
A1
B8
A0
DAISY CHAINING OPERATION
The serial data output pin (SDO) serves two purposes. It can
be used to read out the contents of the wiper setting and
EEMEM values using instruction 10 and 9 respectively. The
remaining instructions (#0–8, #11–15) are valid for daisy-
chaining multiple devices in simultaneous operations.
Daisy-chaining minimizes the number of port pins required
from the controlling IC (see Figure 5). The SDO pin contains
an open drain N-Channel FET that requires a pull-up resistor if
this function is used. As shown in Figure 5, users need to tie
the SDO pin of one package to the SDI pin of the next
package. Users may need to increase the clock period because
the pull-up resistor and the capacitive loading at the SDO-SDI
interface may require additional time delay between subsequent
packages. If two AD5232’s are daisy-chained, 32 bits of data
are required. The first 16 bits go to U2 and the second 16
bits with the same format go to U1. The 16 bits are formatted
to contain the 4-bit instruction, followed by the 4-bit address,
then the 8 bits of data. The CS should be kept low until all 32
bits are locked into their respective serial registers. The CS
is then pulled high to complete the operation.
B7
D7
C
B6
D6
SDI
WP
CS
AD5232
B5
D5
U1
AD5232
CLK
B4
D4
SDO
INPUT
300
B3
D3
+V
WP
R
2k
P
B2
D2
GND
SDI
V
DD
CS
AD5232
B1
D1
U2
CLK
LSB
D0
SDO

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