MCM69F819 Motorola, MCM69F819 Datasheet - Page 6

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MCM69F819

Manufacturer Part Number
MCM69F819
Description
256K x 18 Bit Flow-Through BurstRAM Synchronous Fast Static RAM
Manufacturer
Motorola
Datasheet

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MCM69F819
6
NOTES:
TRUTH TABLE
LINEAR BURST ADDRESS TABLE
INTERLEAVED BURST ADDRESS TABLE
WRITE TRUTH TABLE
Deselect
Deselect
Deselect
Deselect
Deselect
Begin Read
Begin Read
Continue Read
Continue Read
Continue Read
Continue Read
Suspend Read
Suspend Read
Suspend Read
Suspend Read
Begin Write
Continue Write
Continue Write
Suspend Write
Suspend Write
Read
Read
Write Byte a
Write Byte b
Write All Bytes
Write All Bytes
1. X = Don’t Care. 1 = logic high. 0 = logic low.
2. Write is defined as either 1) any SBx and SW low or 2) SGW is low.
3. G is an asynchronous signal and is not sampled by the clock K. G drives the bus immediately (t GLQX ) following G going low.
4. On write cycles that follow read cycles, G must be negated prior to the start of the write cycle to ensure proper write data setup times. G must
5. This read assumes the RAM was previously deselected.
Next Cycle
1st Address (External)
1st Address (External)
also remain negated at the completion of the write cycle to ensure proper write data hold times.
X . . . X00
X . . . X01
X . . . X10
X . . . X00
X . . . X01
X . . . X10
X . . . X11
X . . . X11
(See Notes 1 Through 5)
Address
External
External
External
Current
Current
Current
Current
Current
Current
Used
None
None
None
None
None
Next
Next
Next
Next
Next
Next
Cycle Type
2nd Address (Internal)
2nd Address (Internal)
SE1
(LBO = V SS )
1
0
0
X
X
0
0
X
X
1
1
X
X
1
1
0
X
1
X
1
X . . . X01
X . . . X10
X . . . X11
X . . . X00
X . . . X01
X . . . X00
X . . . X11
X . . . X10
(LBO = V DD )
SE2
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
0
0
1
1
1
SE3
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
1
0
0
0
ADSP
X
X
X
X
X
X
X
0
0
1
1
0
1
1
1
1
1
1
1
1
3rd Address (Internal)
3rd Address (Internal)
SGW
H
H
H
H
H
ADSC
L
X . . . X10
X . . . X00
X . . . X01
X . . . X10
X . . . X00
X . . . X01
X . . . X11
X . . . X11
X
X
X
0
0
0
0
1
1
1
1
1
1
1
1
0
1
1
1
1
ADV
X
X
X
X
X
X
X
0
0
0
0
1
1
1
1
X
0
0
1
1
SW
H
X
L
L
L
L
G 3
X
X
X
X
X
0
0
1
0
1
0
1
0
1
0
X
X
X
X
X
MOTOROLA FAST SRAM
4th Address (Internal)
4th Address (Internal)
High–Z
High–Z
High–Z
High–Z
High–Z
High–Z
High–Z
High–Z
High–Z
High–Z
High–Z
High–Z
High–Z
High–Z
High–Z
High–Z
DQx
SBa
DQ
DQ
DQ
DQ
X
H
H
X
L
L
X . . . X11
X . . . X00
X . . . X01
X . . . X10
X . . . X11
X . . . X10
X . . . X01
X . . . X00
Write 2, 4
READ 5
WRITE
WRITE
WRITE
WRITE
WRITE
READ
READ
READ
READ
READ
READ
READ
READ
X 5
SBb
X
X
X
X
X
X
H
H
X
L
L

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