N02L63W3A ON Semiconductor, N02L63W3A Datasheet - Page 3

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N02L63W3A

Manufacturer Part Number
N02L63W3A
Description
2Mb Ultra-Low Power Asynchronous CMOS SRAM 128Kx16 bit
Manufacturer
ON Semiconductor
Datasheet

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N02L63W3A
Functional Block Diagram
Functional Description
1. When UB and LB are in select mode (low), I/O
2. When the device is in standby mode, control inputs (WE, OE, UB, and LB), address inputs and data input/outputs are internally
3. When WE is invoked, the OE input is internally disabled and has no effect on the circuit.
Capacitance
1. These parameters are verified in device characterization and are not 100% tested
Address
Inputs
A0 - A3
Address
Inputs
A4 - A16
CE
are affected as shown. When UB is in the select mode only I/O
isolated from any external influence and disabled from exerting any influence externally.
H
L
L
L
L
Input Capacitance
I/O Capacitance
CE
WE
OE
UB
LB
WE
Item
X
X
H
H
L
1
Page
Address
Decode
Logic
OE
Word
Address
Decode
Logic
X
H
X
X
Control
Logic
L
3
UB
L
L
X
H
X
1
1
Symbol
C
C
I/O
IN
LB
Rev. 15 | Page 3 of 11 | www.onsemi.com
L
L
X
H
X
1
1
0
32K Page
x 16 word
x 16 bit
RAM Array
- I/O
15
are affected as shown. When LB only is in the select mode only I/O
I/O
V
V
Data Out
Data In
IN
IN
High Z
High Z
High Z
0
- I/O
= 0V, f = 1 MHz, T
= 0V, f = 1 MHz, T
8
- I/O
Test Condition
15
1
15
are affected as shown.
A
A
= 25
= 25
Standby
MODE
Write
Active
Active
Read
o
o
C
C
Input/
Output
Mux
and
Buffers
3
2
Min
I/O8 - I/O15
I/O0 - I/O7
Max
POWER
Standby
8
8
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Active
Active
Active
Active
Unit
pF
pF
0
- I/O
7

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