N02L6181A ON Semiconductor, N02L6181A Datasheet
N02L6181A
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N02L6181A Summary of contents
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... Ultra-Low Power Asynchronous CMOS SRAM 128Kx16 bit Overview The N02L6181A is an integrated memory device containing a 2 Mbit Static Random Access Memory organized as 131,072 words by 16 bits. The device is designed and fabricated using ON Semiconductor’s advanced CMOS technology to provide both high-speed performance and ultra-low power. The base design is the same as ON Semiconductor’ ...
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... N02L6181A Pin Configurations I I I/O I I/O I I I I/O I I ...
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... N02L6181A Functional Block Diagram Word Address Address Inputs Decode 0 3 Logic Page Address Address Inputs Decode 4 16 Logic CE WE Control OE Logic UB LB Functional Description When UB and LB are in select mode (low), I/O are affected as shown ...
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... N02L6181A Absolute Maximum Ratings Item Voltage on any pin relative to V Voltage on V Supply Relative Power Dissipation Storage Temperature Operating Temperature Soldering Temperature and Time 1. Stresses greater than those listed above may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operating section of this specification is not implied ...
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... N02L6181A Power Savings with Page Mode Operation ( Page Address (A4 - A16 ) Word Address ( LB, UB Note: Page mode operation is a method of addressing the SRAM to save operating current. The internal organization of the SRAM is optimized to allow this unique operating mode to be used as a valuable power saving feature ...
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... N02L6181A Timing Test Conditions Item Input Pulse Level Input Rise and Fall Time Input and Output Timing Reference Levels Output Load Power Supply Voltage Operating Temperature Timing Item Read Cycle Time Address Access Time Chip Enable to Valid Output Output Enable to Valid Output ...
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... N02L6181A Timing of Read Cycle ( Address Previous Data Valid Data Out Timing Waveform of Read Cycle (WE= V Address CE OE LB, UB High-Z Data Out , OLZ LBLZ, UBLZ Rev Page www.onsemi.com www ...
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... N02L6181A Timing Waveform of Write Cycle (WE control) Address CE LB High-Z Data In Data Out Timing Waveform of Write Cycle (CE Control) Address CE LB Data In Data Out LBW UBW WHZ LBW UBW t WP ...
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... N02L6181A 44-Lead TSOP II Package (T44) 10.16±0.13 0.80mm REF DETAIL B 0.20 0.00 Note: 1. All dimensions in inches (Millimeters) 2. Package dimensions exclude molding flash 18.41±0.13 11.76±0.20 0.45 0.30 1.10±0.15 0.80mm REF Rev Page www.onsemi.com www.DataSheet4U.com SEE DETAIL ...
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... N02L6181A Ball Grid Array Package D A1 BALL PAD CORNER (3) TOP VIEW K TYP J TYP BOTTOM VIEW Dimensions (mm 6±0.10 8±0.10 0.375 0.28±0.05 1.24±0.10 E SIDE VIEW 1. DIMENSION IS MEASURED AT THE A1 BALL PAD SD MAXIMUM SOLDER BALL DIAMETER. CORNER PARALLEL TO PRIMARY Z. 2. PRIMARY DATUM Z AND SEATING ...
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... Part Number Package N02L6181AB7I Leaded 48-BGA N02L6181AB27I Green 48-BGA (RoHS Compliant) N02L6181AB8I Leaded 48-BGA N02L6181AB28I Green 48-BGA (RoHS Compliant) N02L6181AB7IT Leaded 48-BGA N02L6181AB27IT Green 48-BGA (RoHS Compliant) N02L6181AB8IT Leaded 48-BGA N02L6181AB28IT Green 48-BGA (RoHS Compliant) Revision History Revision # Date A Apr. 2003 B Nov ...