TS1GDOM44H-S Transcend Information, Inc., TS1GDOM44H-S Datasheet - Page 7
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TS1GDOM44H-S
Manufacturer Part Number
TS1GDOM44H-S
Description
44-Pin IDE Flash Modules
Manufacturer
Transcend Information, Inc.
Datasheet
1.TS1GDOM44H-S.pdf
(34 pages)
Notes:
(1) Device address consists of -CS0, -CS1, and A[02::00]
(2) Data consists of D[15::00] (16-bit) or D[07::00] (8 bit)
(3) -IOCS16 is shown for PIO modes 0, 1 and 2. For other modes, this signal is ignored.
(4) The negation of IORDY by the device is used to extend the PIO cycle. The determination of whether the cycle
T
T
T
Transcend Information Inc.
True IDE PIO Mode Timing Diagram
(4-3) Device drives IORDY low before t
r
is to be extended is made by the host after t
of IORDY is described in the following three cases:
r
(4-1) Device never negates IORDY: No wait is generated.
(4-2) Device starts to drive IORDY low before t
r
a
a
a
n
n
n
generated.
s
s
s
cycles where a wait is generated and -IORD is asserted, the device shall place read data on D15-D00 for
t
RD
c
c
c
before causing IORDY to be asserted.
e
e
e
n
n
n
d
d
d
4
4
4
T
T
T
4
4
4
S
S
S
-
-
-
P
P
P
1
1
1
i
i
2
i
2
2
n
n
n
8
8
8
I
M
I
M
I
M
D
D
D
Figure 1: True IDE PIO Mode Timing Diagram
E
E
E
~
~
~
F
F
8
8
F
8
G
A
l
G
l
l
G
: wait generated. The cycle completes after IORDY is reasserted. For
a
a
a
D
s
D
s
D
s
A
from the assertion of -IORD or -IOWR. The assertion and negation
h
h
O
h
O
O
A
M
M
M
M
M
, but causes IORDY to be asserted before t
M
o
4
o
4
4
o
4
7
d
4
4
d
d
H
H
u
H
u
u
l
-
-
l
l
-
e
e
S
e
S
S
(
(
(
H
H
H
o
o
o
r
r
r
i
i
i
z
z
z
o
o
o
n
n
n
t
t
t
a
a
a
l
l
l
)
)
)
A
: No wait
Ver 1.1