AD9248BST-65 Analog Devices, Inc., AD9248BST-65 Datasheet - Page 16

• Manufacturer Part Number: AD9248BST-65
• Description: 14-bit, 20/40/65 Msps Dual A/ D Converter
• Manufacturer: Analog Devices, Inc.

AD9248
input; therefore, the precise values are dependant on the
application. In IF under sampling applications, any shunt
capacitors should be removed. In combination with the driving
source impedance, they would limit the input bandwidth. For
best dynamic performance, the source impedances driving
VIN+ and VIN- should be matched such that common- mode
settling errors are symmetrical. These errors will be reduced by
the common-mode rejection of the ADC.
An internal differential reference buffer creates positive and
negative reference voltages, REFT and REFB, respectively, that
define the span of the ADC core. The output common-mode of
the reference buffer is set to midsupply, and the REFT and
REFB voltages and span are defined as follows:
It can be seen from the equations above that the REFT and
REFB voltages are symmetrical about the mid-supply voltage
and, by definition, the input span is twice the value of the V
voltage.
The internal voltage reference can be pin-strapped to fixed
values of 0.5 V or 1.0 V, or adjusted within the same range as
discussed in the Internal Reference Connection section.
Maximum SNR performance will be achieved with the
AD9248 set to the largest input span of
2 V
changing from 2 V
The SHA may be driven from a source that keeps the signal
peaks within the allowable range for the selected reference
voltage. The minimum and maximum common-mode input
levels are defined as follows:
REFT
REFB
Span
P-P
. The relative SNR degradation will be 3 dB when
2
1
1
2
2
REFT
AVDD
AVDD
Figure xx.
P-P
REFB
mode to 1 V
V
V
Switched Capacitor Input
REF
REF
2
V
REF
P-P
mode.
Rev. PrE | Page 16 of 23
REF
The minimum common- mode input level allows the AD9248 to
accommodate ground-referenced inputs. Although optimum
performance is achieved with a differential input, a single-
ended source may be driven into VIN+ or VIN- . In this
configuration, one input will accept the signal, while the
opposite input should be set to midscale by connecting it to an
appropriate reference. For example, a 2 V
applied to VIN+ while a 1 V reference is applied to VIN- . The
AD9248 will then accept an input signal varying between 2 V
and 0 V. In the single-ended configuration, distortion
performance may degrade significantly as compared to the
differential case. However, the effect will be less noticeable at
lower input frequencies and in the lower speed grade models
(AD9248-40 and AD9248-20).
Differential Input Configurations
As previously detailed, optimum performance will be achieved
while driving the AD9248 in a differential input configuration.
For base band applications, the AD8138 differential driver
provides excellent performance and a flexible interface to the
ADC. The output common- mode voltage of the AD8138 is
easily set to AVDD/2, and the driver can be configured in a
Sallen-Key filter topology to provide band limiting of the input
signal.
At input frequencies in the second Nyquist zone and above, the
performance of most amplifiers will not be adequate to achieve
the true performance of the AD9248. This is especially true in
IF under sampling applications where frequencies in the 70
MHz to 200 MHz range are being sampled. For these
applications, differential transformer coupling is the
recommended input configuration, as shown in Figure .
The signa l characteristics must be considered when selecting a
transformer. Most RF transformers will saturate at frequencies
below a few MHz, and excessive signal power can also cause
core saturation, which leads to distortion.
Single-Ended Input Configuration
A single-ended input may provide adequate performance in
cost-sensitive applications. In this configuration, there will be a
VCM
VCM
Preliminary Technical Data
MIN
MAX
Figure xx.
V
AVDD
REF
2
Differential Transformer Coupling
V
REF
2
P-P
signal may be
AD9248