AD9520-2 Analog Devices, Inc., AD9520-2 Datasheet - Page 58
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AD9520-2
Manufacturer Part Number
AD9520-2
Description
12 Lvpecl/24 Cmos Output Clock Generator With Integrated 2.2 Ghz Vco
Manufacturer
Analog Devices, Inc.
Datasheet
1.AD9520-2.pdf
(84 pages)
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AD9520-2
EEPROM OPERATIONS
The AD9520 contains an internal EEPROM (nonvolatile memory).
The EEPROM can be programmed by users to create and store
a user-defined register setting file when the power is off. This
setting file can be used for power-up and chip reset as a default
setting. The EEPROM size is 512 bytes.
During the data transfer process, the write and read registers via
the serial port are generally not available except for one readback
register, STATUS_EEPROM.
To determine the data transfer state through the serial port in
SPI mode, users can read the value of STATUS_EEPROM (1 =
in process and 0 = completed).
In I2C mode, the user can address the AD9520 slave port with
the external I2C master (send an address byte to the AD9520). If
the AD9520 responds with a no acknowledge bit, the data transfer
process is not done. If the AD9520 responds with an acknowledge
bit, the data transfer process is completed. The user can monitor
the STATUS_EEPROM register or program the STATUS pin to
monitor the status of the data transfer.
WRITING TO THE EEPROM
The EEPROM cannot be programmed directly through the serial
port interface. To program the EEPROM and store a register
setting file, do the following:
1.
2.
3.
4.
5.
Program the AD9520 registers to the desired circuit state. If
the user wants the PLL to lock automatically after power-up,
the VCO calibration now bit (0x018[0]) must be set to 1.
This allows VCO calibration to start automatically after
register loading. Note that a valid input reference signal
must be present during VCO calibration.
Program the EEPROM buffer registers, if necessary (see
the Programming the EEPROM Buffer Segment section).
This is only necessary if users want to use the EEPROM to
control the default setting of some (but not all) of the
AD9520 registers, or if they want to control the register
setting update sequence during power-up or chip reset.
Set the enable EEPROM write bit (0xB02[0]) to 1 to enable
the EEPROM.
Set the REG2EEPROM bit (0xB03[0]) to 1.
Set the IO_UPDATE bit (0x232[0]) to 1, which starts the
process of writing data into the EEPROM to create the
EEPROM setting file. This enables the AD9520 EEPROM
controller to transfer the current register values, as well as
the memory address and instruction bytes from the EEPROM
buffer segment, into the EEPROM. After the write process
is completed, the internal controller sets 0xB03[0]
(REG2EEPROM) back to 0.
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6.
To verify that the data transfer has completed correctly, the user
can verify that 0xB01[0] = 0. A value of 1 in this register indicates a
data transfer error.
READING FROM THE EEPROM
The following reset-related events can start the process of
restoring the settings stored in EEPROM to control registers.
When the EEPROM pin is set high, do any of the following:
1.
2.
3.
When the EEPROM pin is set low, set the self-clearing
Soft_EEPROM bit (0xB02[1]) to 1. The AD9520 then starts to
read the EEPROM and loads the values into the AD9520.
If the EEPROM pin is low during reset or power-up, the
EEPROM is not active, and the AD9520 default values are
loaded instead.
When using the EEPROM to automatically load the AD9520
register values and lock the PLL, the VCO calibration now bit
(0x018[0]) must be set to 1 when the register values are written
to the EEPROM. This allows VCO calibration to start
automatically after register loading. A valid input reference
signal must be present during VCO calibration.
To verify that the data transfer has completed correctly, the user
can verify that 0xB01[0] = 0. A value of 1 in this register indicates a
data transfer error.
The readback register, STATUS_EEPROM (0xB00[0]),
is used to indicate the data transfer status between the
EEPROM and the control registers (0 = done/inactive;
1 = in process/active). At the beginning of the data transfer,
STATUS_EEPROM is set to 1 by the EEPROM controller
and cleared to 0 at the end of the data transfer. The user
can access STATUS_EEPROM through the STATUS pin
when the STATUS pin is programmed to monitor
STATUS_EEPROM. Alternatively, the user can monitor
the STATUS_EEPROM bit.
After the data transfer process is done (0xB00[0] = 0), set
the enable EEPROM write register (0xB02[0]) to 0 to
disable writing to the EEPROM.
Power-up the AD9520.
Perform a hardware chip reset by pulling the RESET pin
low and then releasing RESET .
Set the self-clearing soft reset bit (0x000[5]) to 1.