AD9859 Analog Devices, Inc., AD9859 Datasheet - Page 12

• Manufacturer Part Number: AD9859
• Description: 400 Msps, 10-bit, 1.8 V Cmos Direct Digital Synthesizer
• Manufacturer: Analog Devices, Inc.

AD9859
DAC Output
The AD9859 incorporates an integrated 10-bit current output
DAC. Unlike most DACs, this output is referenced to AVDD,
not AGND.
Two complementary outputs provide a combined full-scale
output current (I
common-mode noise that might be present at the DAC output,
offering the advantage of an increased signal-to-noise ratio. The
full-scale current is controlled by an external resistor (R
connected between the DAC_R
(AGND_DAC). The full-scale current is proportional to the
resistor value as follows:
The maximum full-scale output current of the combined DAC
outputs is 15 mA, but limiting the output to 10 mA provides the
best spurious-free dynamic range (SFDR) performance. The DAC
output compliance range is AVDD + 0.5 V to AVDD – 0.5 V.
Voltages developed beyond this range cause excessive DAC
distortion and could potentially damage the DAC output cir-
cuitry. Proper attention should be paid to the load termination
to keep the output voltage within this compliance range.
OUT
). Differential outputs reduce the amount of
R
SET
=
39
SET
.
19
pin and the DAC ground
/
I
OUT
SET
)
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Serial I/O Port
The AD9859 serial port is a flexible, synchronous serial communi-
cations port that allows easy interface to many industry-standard
microcontrollers and microprocessors. The serial I/O port is com-
patible with most synchronous transfer formats, including both the
Motorola 6905/11 SPI® and Intel® 8051 SSR protocols.
The interface allows read/write access to all registers that configure
the AD9859. MSB first or LSB first transfer formats are supported.
The AD9859’s serial interface port can be configured as a single pin
I/O (SDIO), which allows a 2-wire interface or two unidirectional
pins for in/out (SDIO/SDO), which in turn enables a 3-wire inter-
face. Two optional pins, IOSYNC and CS , enable greater flexibility
for system design in the AD9859.
Register Map and Descriptions
The register map is listed in Table 5.