LP3927ILQ-AH National Semiconductor, LP3927ILQ-AH Datasheet - Page 10

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LP3927ILQ-AH

Manufacturer Part Number
LP3927ILQ-AH
Description
Cellular/PCS System Power Management IC
Manufacturer
National Semiconductor
Datasheet
Keyboard Start-Up/Shut-Down
20037925
Note: Diagram indicates Open Drain IRQ tied to V
.
DD
***
= Internal signal
1. Keyboard de-bounce delay, 32 msec typ.
2. Delay between LDO1 reaching 95% of its output voltage and LDO2 enable, 125 µsec typical.
3. Both LDO1 and LDO2 outputs reach 95% of respective output voltage, start RST timer.
4. RST delay, 20 msec typical.
5. IRQ is active low.
6. Keyboard press must be greater than 32 msec.
7. PS_HOLD timer begins upon RST going high.
8. Maximum of 500 msec period from RST going high to PS_HOLD going high.
9. Response time from PS_HOLD going low to RST going low.
10. Delay between RST high-low transition to LDO2 disable.
11. Delay between LDO2 disable and LDO1 disable.
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