CS8122 Cherry Semiconductor Corporation, CS8122 Datasheet - Page 5

• Manufacturer Part Number: CS8122
• Description: 2% 5V/ 750mA Low Dropout Linear Regulator with Delayed RESET
• Manufacturer: Cherry Semiconductor Corporation

The CS8122
reset and delay comparators, a latching Delay capacitor
discharge circuit, and operates down to 1V.
The
ON and OFF parameters as specified. The
NPN transistor is controlled by the two circuits described
(see Block Diagram).
The Low Voltage Inhibit Circuit monitors output voltage,
and when output voltage is below the specified minimum,
causes the
ration) state. When the output voltage is above the speci-
fied level, this circuit permits the
to go into the OFF state if allowed by the
cuit.
*C
**C
IN
RESET
OUT
required if regulator is far from power source filter.
required for stability.
RESET
circuit output is an open collector type with
RESET
Low Voltage Inhibit Circuit
output transistor to be in the ON (satu-
function, has hysteresis on both the
(3)
C
100nF
RESET
C
IN
0.1mF
Delay
V
V
Delay
V
V
*
OUT
V
RT(OFF)
RT(ON)
DC(LO)
DC(HI)
RESET
V
V
output transistor
RL
V
RESET
RH
DH
RESET
RESET Circuit Waveform
Delay cir-
output
V
Delay
Circuit Description
IN
(1)
t
Test Circuit
Delay
CS8122
Gnd
(2)
5
The Reset Delay Circuit provides a programmable (by
external capacitor) delay on the
Delay lead provides source current to the external delay
capacitor only when the Low Voltage Inhibit circuit indi-
cates that output voltage is above V
Delay lead sinks current to ground (used to discharge the
delay capacitor). The discharge current is latched ON
when the output voltage is below V
capacitor is fully discharged anytime the output voltage
falls out of regulation, even for a short period of time. This
feature ensures that a controlled
following detection of an error condition. The circuit
allows the
state only when the voltage on the Delay lead is higher
than V
RESET
(2)
V
OUT
DC(HI)
RESET
.
R
4.7kW
output transistor to go to the OFF (open)
RST
Reset Delay Circuit
V
RESET
(1) = No Delay Capacitor
(2) = With Delay Capacitor
(3) = Max: RESET Voltage (1.0V)
DIS
RESET
RT(ON)
RT(OFF)
C
10mF
OUT
output lead. The
pulse is generated
. Otherwise, the
. The Delay
**