CS493002-CL Cirrus Logic, CS493002-CL Datasheet - Page 81
![no-image](/images/no-image-200.jpg)
CS493002-CL
Manufacturer Part Number
CS493002-CL
Description
Multi-Standard Audio Decoder Family
Manufacturer
Cirrus Logic
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
CLKSEL—DSP Clock Select: Pin 31
DATA7, EMAD7, GPIO7—Pin 8
DATA6, EMAD6, GPIO6—Pin 9
DATA5, EMAD5, GPIO5—Pin 10
DATA4, EMAD4, GPIO4—Pin 11
DATA3, EMAD3, GPIO3—Pin 14
DATA2, EMAD2, GPIO2—Pin 15
DATA1, EMAD1, GPIO1—Pin 16
DATA0, EMAD0, GPIO0—Pin 17
A0, SCCLK—Host Parallel Address Bit Zero or Serial Control Port Clock: Pin 7
A1, SCDIN—Host Address Bit One or SPI Serial Control Data Input: Pin 6
RD, R/W, EMOE, GPIO11—Host Parallel Output Enable or Host Parallel R/W or External
Memory Output Enable or General Purpose Input & Output Number 11: Pin 5
WR, DS, EMWR, GPIO10—Host Write Strobe or Host Data Strobe or External Memory Write
Enable or General Purpose Input & Output Number 10: Pin 4
DS339PP4
This pin selects the clock mode of the CS493XX. When CLKSEL is low, CLKIN is connected
to the internal PLL from which all internal clocks are derived. When CLKSEL is high CLKIN
is connected to the DSP clock. INPUT
In parallel host mode, these pins provide a bidirectional data bus. If a serial host mode is
selected, these pins can provide a multiplexed address and data bus for connecting an 8-bit
external memory. Otherwise, in serial host mode, these pins can act as general-purpose input or
output pins that can be individually configured and controlled by the DSP.
BIDIRECTIONAL - Default: INPUT
In parallel host mode, this pin serves as one of two address input pins used to select one of four
parallel registers. In serial host mode, this pin serves as the serial control clock signal,
specifically as the SPI clock input or the I
In parallel host mode, this pin serves as one of two address input pins used to select one of four
parallel registers. In SPI serial host mode, this pin serves as the data input. INPUT
In Intel parallel host mode, this pin serves as the active-low data bus enable input. In Motorola
parallel host mode, this pin serves as the read-high/write-low control input signal. In serial host
mode, this pin can serve as the external memory active-low data-enable output signal. Also in
serial host mode, this pin can serve as a general purpose input or output bit.
BIDIRECTIONAL - Default: INPUT
In Intel parallel host mode, this pin serves as the active-low data-write-input strobe. In
Motorola parallel host mode, this pin serves as the active-low data-strobe-input signal. In serial
host mode, this pin can serve as the external-memory active-low write-enable output signal.
Also in serial host mode, this pin can serve as a general purpose input or output bit.
BIDIRECTIONAL - Default: INPUT
2
C clock input. INPUT
CS49300 Family DSP
81