MD3331-D32-V3Q18-P M-Systems, MD3331-D32-V3Q18-P Datasheet - Page 61
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MD3331-D32-V3Q18-P
Manufacturer Part Number
MD3331-D32-V3Q18-P
Description
Mobile DiskOnChip Plus 16/32MByte 1.8V I/O Flash Disk, Protection and Security-Enabling Features
Manufacturer
M-Systems
Datasheet
1.MD3331-D32-V3Q18-P.pdf
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61
1. CE# may be asserted any time before or after WE# is asserted. If CE# is asserted after WE#, all timing relative to WE# asserted will be
referenced instead to the time of CE# asserted.
2. CE# may be negated any time before or after WE# is negated. If CE# is negated before WE#, all timing relative to WE# negated will be
referenced instead to the time of CE# negated.
3. WE# may be asserted before or after the rising edge of AVD#. The beginning of the WE# asserted pulse width spec is measured from the
later of the falling edge of WE# or the rising edge of AVD#.
tsu(AVD-WE)
Trec(WE-AVD)
tsu(CE0)
tho(CE0)
tho(AVD)
tsu(AVD)
Tw(AVD)
tho(CE1)
tsu(CE1)
trec(WE)
Symbol
tw(WE)
Tsu(D)
Tho(D)
Twcyc
1
2
1
Table 21: Multiplexed Interface Write Cycle Parameters (VCC=2.7-3.6V)
Address to AVD#
Address to AVD#
AVD# low pulse width
AVD#
WE#
WE# asserted width (RAM)
WE# asserted width (all other addresses)
Write Cycle Time
CE#
WE#
OE# or WE#
CE#
WE#
D to WE#
WE#
to WE#
to WE#
to AVD#
to CE#
to start of next cycle
to D hold time
to WE#
setup time (RAM)
Description
to CE#
setup time
hold time
or OE#
setup time
in next cycle
setup time
hold time
Data Sheet, Rev. 1.7
hold time
3
setup time
VCC=2.7-3.6V
VCCQ=VCC
Min
12
28
48
49
79
20
27
—
—
5
7
4
6
6
0
Mobile DiskOnChip Plus 16/32MByte 1.8V I/O
Max
VCCQ=1.65-1.9V
VCC=2.7-3.6V
Min
12
30
47
48
79
20
28
—
—
4
5
7
6
6
0
Max
95-SR-000-10-8L
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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