SLD-1000 Sirenza Microdevices, SLD-1000 Datasheet
SLD-1000
Related parts for SLD-1000
SLD-1000 Summary of contents
Page 1
... LDMOS transistor die, designed for operation from 10 to 2700MHz excellent solution for applications requiring high linearity and effi- ciency. The SLD-1000 is typically used as a driver or output stage for power amplifier, or transmitter applications. These robust power tran- sistors are fabricated using Sirenza’s high performance XEMOS II process ...
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... For reliable continuous operation see typical setup values specified in the table on page one. Caution: ESD Sensitive Appropriate precaution in handling, packaging and testing devices must be observed. 303 S. Technology Court Broomfield, CO 80021 SLD-1000 10-2700 MHz 4 Watt LDMOS FET - Bare Die C Channel (Backside contact) Pad #2 Drain Manifold Value ...
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... Impedances Referenced to Wirebond/PCB Interface. are the optimal impedances presented to the SLD-1000 when operating at 28V, Idq=30mA, Pout=3.5 W PEP. Z and Z source load 303 S. Technology Court Broomfield, CO 80021 SLD-1000 10-2700 MHz 4 Watt LDMOS FET - Bare Die De-embedding Information Z load Number of Bond Wires 12 ...
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... Efficiency IM3 IM5 50 IM7 IRL 900 905 910 915 Frequency (MHz) 303 S. Technology Court Broomfield, CO 80021 SLD-1000 10-2700 MHz 4 Watt LDMOS FET - Bare Die -12 20 - 920 925 Vdd=28V, Idq=50mA, Freq=915 MHz, Delta F=1 MHz ...
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... Die Map AuSi, AuSn, or AuGe eutectic die attach is recommended. AlSi bond wires are recommended. 303 S. Technology Court Broomfield, CO 80021 SLD-1000 10-2700 MHz 4 Watt LDMOS FET - Bare Die Dimensions Inches [mm] 0.030 [0.76] SOURCE - BACKSIDE CONTACT - NOT SHOWN DIE THICKNESS - 0.004 [0.10] Phone: (800) SMI-MMIC ...