LM3S308 Luminary Micro, Inc, LM3S308 Datasheet - Page 170

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LM3S308

Manufacturer Part Number
LM3S308
Description
Lm3s308 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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General-Purpose Timers
9.2.3.4
170
Figure 9-3. 16-Bit Input Edge Time Mode Example
16-Bit PWM Mode
Note:
The GPTM supports a simple PWM generation mode. In PWM mode, the timer is configured as a
down-counter with a start value (and thus period) defined by GPTMTnILR. PWM mode is enabled
with the GPTMTnMR register by setting the TnAMS bit to 0x1, the TnCMR bit to 0x0, and the TnMR
field to 0x2.
When software writes the TnEN bit in the GPTMCTL register, the counter begins counting down
until it reaches the 0x0000 state. On the next counter cycle, the counter reloads its start value from
GPTMTnILR and continues counting until disabled by software clearing the TnEN bit in the GPTMCTL
register. No interrupts or status bits are asserted in PWM mode.
The output PWM signal asserts when the counter is at the value of the GPTMTnILR register (its
start state), and is deasserted when the counter value equals the value in the GPTM Timern Match
Register (GPTMnMATCHR). Software has the capability of inverting the output PWM signal by
setting the TnPWML bit in the GPTMCTL register.
Figure 9-4 on page 171 shows how to generate an output PWM with a 1-ms period and a 66% duty
cycle assuming a 50-MHz input clock and TnPWML =0 (duty cycle would be 33% for the TnPWML
=1 configuration). For this example, the start value is GPTMnIRL=0xC350 and the match value is
GPTMnMR=0x411A.
Input Signal
The prescaler is not available in 16-Bit PWM mode.
0xFFFF
Count
Y
Z
X
GPTMTnR=X
Preliminary
GPTMTnR=Y
GPTMTnR=Z
Time
June 04, 2008

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