LM3S2620 Luminary Micro, Inc, LM3S2620 Datasheet - Page 128

• Manufacturer Part Number: LM3S2620
• Description: Lm3s2620 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Hibernation Module
7.3.2
7.3.3
7.3.4
7.3.5
7.4
128
up and the above steps are not necessary. The software can detect that the Hibernation module
and clock are already powered by examining the CLK32EN bit of the HIBCTL register.
RTC Match Functionality (No Hibernation)
Use the following steps to implement the RTC match functionality of the Hibernation module:
1.
2.
3.
4.
RTC Match/Wake-Up from Hibernation
Use the following steps to implement the RTC match and wake-up functionality of the Hibernation
module:
1.
2.
3.
4.
External Wake-Up from Hibernation
Use the following steps to implement the Hibernation module with the external WAKE pin as the
wake-up source for the microcontroller:
1.
2.
RTC/External Wake-Up from Hibernation
1.
2.
3.
4.
Register Map
Table 7-1 on page 129 lists the Hibernation registers. All addresses given are relative to the Hibernation
Module base address at 0x400F.C000.
Write the required RTC match value to one of the HIBRTCMn registers at offset 0x004 or 0x008.
Write the required RTC load value to the HIBRTCLD register at offset 0x00C.
Set the required RTC match interrupt mask in the RTCALT0 and RTCALT1 bits (bits 1:0) in the
HIBIM register at offset 0x014.
Write 0x0000.0041 to the HIBCTL register at offset 0x010 to enable the RTC to begin counting.
Write the required RTC match value to the HIBRTCMn registers at offset 0x004 or 0x008.
Write the required RTC load value to the HIBRTCLD register at offset 0x00C.
Write any data to be retained during power cut to the HIBDATA register at offsets 0x030-0x12C.
Set the RTC Match Wake-Up and start the hibernation sequence by writing 0x0000.004F to the
HIBCTL register at offset 0x010.
Write any data to be retained during power cut to the HIBDATA register at offsets 0x030-0x12C.
Enable the external wake and start the hibernation sequence by writing 0x0000.0056 to the
HIBCTL register at offset 0x010.
Write the required RTC match value to the HIBRTCMn registers at offset 0x004 or 0x008.
Write the required RTC load value to the HIBRTCLD register at offset 0x00C.
Write any data to be retained during power cut to the HIBDATA register at offsets 0x030-0x12C.
Set the RTC Match/External Wake-Up and start the hibernation sequence by writing 0x0000.005F
to the HIBCTL register at offset 0x010.
Preliminary
July 25, 2008