LM3S2139 Luminary Micro, Inc, LM3S2139 Datasheet - Page 8

• Manufacturer Part Number: LM3S2139
• Description: Lm3s2139 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Table of Contents
List of Figures
Figure 1-1.
Figure 2-1.
Figure 2-2.
Figure 5-1.
Figure 5-2.
Figure 5-3.
Figure 5-4.
Figure 5-5.
Figure 6-1.
Figure 6-2.
Figure 6-3.
Figure 7-1.
Figure 8-1.
Figure 8-2.
Figure 8-3.
Figure 9-1.
Figure 9-2.
Figure 9-3.
Figure 9-4.
Figure 10-1.
Figure 11-1.
Figure 11-2.
Figure 11-3.
Figure 11-4.
Figure 11-5.
Figure 12-1.
Figure 12-2.
Figure 12-3.
Figure 13-1.
Figure 13-2.
Figure 13-3.
Figure 13-4.
Figure 13-5.
Figure 13-6.
Figure 13-7.
Figure 13-8.
Figure 13-9.
Figure 13-10. MICROWIRE Frame Format (Single Frame) .................................................................... 323
Figure 13-11. MICROWIRE Frame Format (Continuous Transfer) ......................................................... 324
Figure 13-12. MICROWIRE Frame Format, SSIFss Input Setup and Hold Requirements ........................ 324
Figure 14-1.
Figure 14-2.
Figure 14-3.
Figure 14-4.
Figure 14-5.
8
Stellaris
CPU Block Diagram ......................................................................................................... 37
TPIU Block Diagram ........................................................................................................ 38
JTAG Module Block Diagram ............................................................................................ 48
Test Access Port State Machine ....................................................................................... 51
IDCODE Register Format ................................................................................................. 56
BYPASS Register Format ................................................................................................ 57
Boundary Scan Register Format ....................................................................................... 57
External Circuitry to Extend Reset .................................................................................... 59
Power Architecture .......................................................................................................... 61
Main Clock Tree .............................................................................................................. 63
Flash Block Diagram ...................................................................................................... 116
GPIO Port Block Diagram ............................................................................................... 141
GPIODATA Write Example ............................................................................................. 142
GPIODATA Read Example ............................................................................................. 142
GPTM Module Block Diagram ........................................................................................ 183
16-Bit Input Edge Count Mode Example .......................................................................... 187
16-Bit Input Edge Time Mode Example ........................................................................... 188
16-Bit PWM Mode Example ............................................................................................ 189
WDT Module Block Diagram .......................................................................................... 218
ADC Module Block Diagram ........................................................................................... 242
Differential Sampling Range, V
Differential Sampling Range, V
Differential Sampling Range, V
Internal Temperature Sensor Characteristic ..................................................................... 246
UART Module Block Diagram ......................................................................................... 275
UART Character Frame ................................................................................................. 276
IrDA Data Modulation ..................................................................................................... 278
SSI Module Block Diagram ............................................................................................. 315
TI Synchronous Serial Frame Format (Single Transfer) .................................................... 318
TI Synchronous Serial Frame Format (Continuous Transfer) ............................................ 318
Freescale SPI Format (Single Transfer) with SPO=0 and SPH=0 ...................................... 319
Freescale SPI Format (Continuous Transfer) with SPO=0 and SPH=0 .............................. 319
Freescale SPI Frame Format with SPO=0 and SPH=1 ..................................................... 320
Freescale SPI Frame Format (Single Transfer) with SPO=1 and SPH=0 ........................... 321
Freescale SPI Frame Format (Continuous Transfer) with SPO=1 and SPH=0 .................... 321
Freescale SPI Frame Format with SPO=1 and SPH=1 ..................................................... 322
I
I
START and STOP Conditions ......................................................................................... 353
Complete Data Transfer with a 7-Bit Address ................................................................... 354
R/S Bit in First Byte ........................................................................................................ 354
2
2
C Block Diagram ......................................................................................................... 352
C Bus Configuration .................................................................................................... 353
®
2000 Series High-Level Block Diagram ............................................................... 29
IN_ODD
IN_ODD
IN_ODD
Preliminary
= 1.5 V .................................................................. 245
= 0.75 V ................................................................ 245
= 2.25 V ................................................................ 246
July 25, 2008