LM3S6918 Luminary Micro, Inc, LM3S6918 Datasheet - Page 118

• Manufacturer Part Number: LM3S6918
• Description: Lm3s6918 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Reset
Reset
Type
Type
System Control
Software Reset Control 1 (SRCR1)
Base 0x400F.E000
Offset 0x044
Type R/W, reset 0x00000000
118
Bit/Field
31:26
23:20
reserved
25
24
19
18
17
16
15
14
13
RO
RO
31
15
0
0
I2C1
R/W
Register 28: Software Reset Control 1 (SRCR1), offset 0x044
Writes to this register are masked by the bits in the Device Capabilities 2 (DC2) register.
RO
30
14
0
0
reserved
reserved
reserved
reserved
reserved
RO
RO
TIMER3
TIMER2
TIMER1
TIMER0
COMP1
COMP0
29
13
0
0
Name
I2C1
reserved
I2C0
R/W
RO
28
12
0
0
RO
RO
27
11
0
0
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
RO
RO
26
10
0
0
COMP1
Reset
R/W
RO
25
0
9
0
0
0
0
0
0
0
0
0
0
0
0
reserved
Preliminary
COMP0
R/W
RO
24
0
8
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Analog Comp 1 Reset Control
Reset control for analog comparator 1.
Analog Comp 0 Reset Control
Reset control for analog comparator 0.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Timer 3 Reset Control
Reset control for General-Purpose Timer module 3.
Timer 2 Reset Control
Reset control for General-Purpose Timer module 2.
Timer 1 Reset Control
Reset control for General-Purpose Timer module 1.
Timer 0 Reset Control
Reset control for General-Purpose Timer module 0.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
I2C1 Reset Control
Reset control for I2C unit 1.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
RO
RO
23
0
7
0
RO
RO
22
0
6
0
reserved
SSI1
R/W
RO
21
0
5
0
SSI0
R/W
RO
20
0
4
0
TIMER3
R/W
RO
19
0
3
0
reserved
TIMER2
R/W
RO
18
0
2
0
July 26, 2008
TIMER1
UART1
R/W
R/W
17
0
1
0
TIMER0
UART0
R/W
R/W
16
0
0
0