LM3S1918 Luminary Micro, Inc, LM3S1918 Datasheet - Page 434

• Manufacturer Part Number: LM3S1918
• Description: Lm3s1918 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Signal Tables
434
I2C
JTAG/SWD/SWO
Power
Function
CCP3
CCP4
CCP5
CCP6
CCP7
I2C0SCL
I2C0SDA
I2C1SCL
I2C1SDA
SWCLK
SWDIO
SWO
TCK
TDI
TDO
TMS
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GNDA
GNDA
HIB
LDO
Pin Name
Number
Pin
23
22
25
86
85
70
71
34
35
80
79
77
80
78
77
79
15
21
33
39
45
54
57
63
69
82
87
94
97
51
9
4
7
Preliminary
Pin Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
I
I
I
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Buffer
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Type
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
OD
OD
OD
OD
Capture/Compare/PWM 3
Capture/Compare/PWM 4
Capture/Compare/PWM 5
Capture/Compare/PWM 6
Capture/Compare/PWM 7
I2C module 0 clock
I2C module 0 data
I2C module 1 clock
I2C module 1 data
JTAG/SWD CLK
JTAG TMS and SWDIO
JTAG TDO and SWO
JTAG/SWD CLK
JTAG TDI
JTAG TDO and SWO
JTAG TMS and SWDIO
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
The ground reference for the analog circuits (ADC,
Analog Comparators, etc.). These are separated
from GND to minimize the electrical noise contained
on VDD from affecting the analog functions.
The ground reference for the analog circuits (ADC,
Analog Comparators, etc.). These are separated
from GND to minimize the electrical noise contained
on VDD from affecting the analog functions.
An output that indicates the processor is in
hibernate mode.
Low drop-out regulator output voltage. This pin
requires an external capacitor between the pin and
GND of 1 µF or greater. The LDO pin must also be
connected to the VDD25 pins at the board level in
addition to the decoupling capacitor(s).
Description
July 26, 2008