LM3S1911 Luminary Micro, Inc, LM3S1911 Datasheet - Page 5

• Manufacturer Part Number: LM3S1911
• Description: Lm3s1911 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

10
10.1
10.2
10.2.1 GPTM Reset Conditions .......................................................................................................... 203
10.2.2 32-Bit Timer Operating Modes .................................................................................................. 203
10.2.3 16-Bit Timer Operating Modes .................................................................................................. 204
10.3
10.3.1 32-Bit One-Shot/Periodic Timer Mode ....................................................................................... 208
10.3.2 32-Bit Real-Time Clock (RTC) Mode ......................................................................................... 209
10.3.3 16-Bit One-Shot/Periodic Timer Mode ....................................................................................... 209
10.3.4 16-Bit Input Edge Count Mode ................................................................................................. 210
10.3.5 16-Bit Input Edge Timing Mode ................................................................................................ 210
10.3.6 16-Bit PWM Mode ................................................................................................................... 211
10.4
10.5
11
11.1
11.2
11.3
11.4
11.5
12
12.1
12.2
12.2.1 Transmit/Receive Logic ........................................................................................................... 261
12.2.2 Baud-Rate Generation ............................................................................................................. 262
12.2.3 Data Transmission .................................................................................................................. 262
12.2.4 Serial IR (SIR) ......................................................................................................................... 263
12.2.5 FIFO Operation ....................................................................................................................... 264
12.2.6 Interrupts ................................................................................................................................ 264
12.2.7 Loopback Operation ................................................................................................................ 265
12.2.8 IrDA SIR block ........................................................................................................................ 265
12.3
12.4
12.5
13
13.1
13.2
13.2.1 Bit Rate Generation ................................................................................................................. 302
13.2.2 FIFO Operation ....................................................................................................................... 302
13.2.3 Interrupts ................................................................................................................................ 302
13.2.4 Frame Formats ....................................................................................................................... 303
13.3
13.4
13.5
14
14.1
July 26, 2008
General-Purpose Timers ................................................................................................. 201
Block Diagram ........................................................................................................................ 201
Functional Description ............................................................................................................. 202
Initialization and Configuration ................................................................................................. 208
Register Map .......................................................................................................................... 211
Register Descriptions .............................................................................................................. 212
Watchdog Timer ............................................................................................................... 237
Block Diagram ........................................................................................................................ 237
Functional Description ............................................................................................................. 237
Initialization and Configuration ................................................................................................. 238
Register Map .......................................................................................................................... 238
Register Descriptions .............................................................................................................. 239
Universal Asynchronous Receivers/Transmitters (UARTs) ......................................... 260
Block Diagram ........................................................................................................................ 261
Functional Description ............................................................................................................. 261
Initialization and Configuration ................................................................................................. 265
Register Map .......................................................................................................................... 266
Register Descriptions .............................................................................................................. 267
Synchronous Serial Interface (SSI) ................................................................................ 301
Block Diagram ........................................................................................................................ 301
Functional Description ............................................................................................................. 301
Initialization and Configuration ................................................................................................. 310
Register Map .......................................................................................................................... 311
Register Descriptions .............................................................................................................. 312
Inter-Integrated Circuit (I
Block Diagram ........................................................................................................................ 338
2
C) Interface ............................................................................ 338
Preliminary
LM3S1911 Microcontroller
5