LM3S1110 Luminary Micro, Inc, LM3S1110 Datasheet - Page 360
LM3S1110
Manufacturer Part Number
LM3S1110
Description
Lm3s1110 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S1110.pdf
(405 pages)
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Signal Tables
360
Pin Number
E12
G10
G11
G12
H10
H11
H12
F10
F11
F12
J10
J12
J11
G1
G2
G3
F1
F2
F3
H1
H2
H3
K1
K2
K3
K4
K5
J1
J2
J3
Pin Name
VDD25
VDD25
VDD33
VDD33
VDD33
VDD33
CCP0
U1Tx
U1Rx
PB0
PD7
C0o
PD6
GND
GND
GND
PD0
PD1
PD3
PD2
GND
RST
PF1
GND
GND
PF2
PF3
GND
NC
NC
NC
NC
NC
NC
Preliminary
Pin Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
I
I
Buffer Type
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
-
-
-
-
-
-
Description
GPIO port B bit 0
Capture/Compare/PWM 0
GPIO port D bit 7
Analog comparator 0 output
GPIO port D bit 6
Positive supply for most of the logic function,
including the processor core and most
peripherals.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
GPIO port D bit 0
GPIO port D bit 1
Positive supply for most of the logic function,
including the processor core and most
peripherals.
Positive supply for I/O and some logic.
Positive supply for I/O and some logic.
Positive supply for I/O and some logic.
GPIO port D bit 3
UART module 1 transmit. When in IrDA mode,
this signal has IrDA modulation.
GPIO port D bit 2
UART module 1 receive. When in IrDA mode,
this signal has IrDA modulation.
Ground reference for logic and I/O pins.
Positive supply for I/O and some logic.
System reset input.
GPIO port F bit 1
No connect. Leave the pin electrically
unconnected/isolated.
No connect. Leave the pin electrically
unconnected/isolated.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
GPIO port F bit 2
GPIO port F bit 3
No connect. Leave the pin electrically
unconnected/isolated.
No connect. Leave the pin electrically
unconnected/isolated.
No connect. Leave the pin electrically
unconnected/isolated.
No connect. Leave the pin electrically
unconnected/isolated.
Ground reference for logic and I/O pins.
July 25, 2008
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