SPC41B1 Sunplus Technology Co., Ltd., SPC41B1 Datasheet - Page 5

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SPC41B1

Manufacturer Part Number
SPC41B1
Description
40KB SOUND CONTROLLER
Manufacturer
Sunplus Technology Co., Ltd.
Datasheet
6. FUNCTIONAL DESCRIPTIONS
6.1. CPU
The 8-bit microprocessor of SPC41B1 is a high performance
processor equipped with Accumulator, Program Counter, X
Register, Stack pointer and Processor Status Register (this is the
same as the 6502 instruction structure).
perform with 6.0MHz (max.) depending on the application
specifications.
6.2. ROM AREA
The SPC41B1 provides a 40K-byte ROM that can be defined as
the program area, audio data area, or both. To access ROM,
users should program the BANK SELECT Register, choose bank,
and access address to fetch data.
6.3. RAM AREA
The SPC41B1 total RAM consists of 64 bytes (including Stack) at
locations from $C0 through $FF.
6.4. Map of Memory and I/Os
*I/O PORT:
*NMI SOURCE:
*INT SOURCE:
© Sunplus Technology Co., Ltd.
Proprietary & Confidential
─ INTA (from TIMER A)
INTA (from TIMER A)
INTB (from TIMER B)
CPU CLK / 1024
CPU CLK / 8192
CPU CLK / 65536
EXT INT
PORT IOC
I/O CONFIG $0000
IOD
$0005
$0001
$0004
$000C0
$00600
$08000
$0E000
*MEMORY MAP (From ROM view)
$00000
$00100
$00200
$0FFFF
SUNPLUS TEST PROGRAM
USER RAM and STACK
USER'S PROGRAM &
SPC41B1 is able to
HW register, I/Os
DUMMY AREA
ROM BANK #0
ROM BANK #1
DATA AREA
UNUSED
5
6.5. I/O Port Configuration*
* Values shown are for VDD = 5.0V test conditions only.
Input/Output IOC port : IOC3 - 0
Input/Output IOD port : IOD7 - 4
Input/Output IOD port : IOD3 - 0
OD : Open Drain
OD : Open Drain
input data
OD : Open Drain
input data
input data
logic_4
control
logic_2
logic_3
control
control
output
output
output
data
data
data
OD-NMOS
OD-PMOS
OD-PMOS
buffer or
or buffer
or buffer
SPC41B1
VDD
90K
60K
60K
SEP. 04, 2001
Version: 1.3

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