SPC41B2 Sunplus Technology Co., Ltd., SPC41B2 Datasheet - Page 5

• Manufacturer Part Number: SPC41B2
• Description: 40KB SOUND CONTROLLER
• Manufacturer: Sunplus Technology Co., Ltd.

*INT SOURCE:
6. FUNCTIONAL DESCRIPTIONS
6.1. CPU
The SPC41B2 8-bit microprocessor is a high performance
processor equipped with Accumulator, Program Counter, X
Register, Stack pointer and Processor Status Register (this is the
same as the 6502 instruction structure).
perform with 6.0MHz (max.) depending on the application
specifications.
6.2. ROM Area
The SPC41B2 provides a 40K-byte ROM that can be defined as
the program area, audio data area, or both. To access ROM,
users should program the BANK SELECT Register, choose bank,
and access address to fetch data.
6.3. RAM Area
The SPC41B2 total RAM consists of 64-bytes (including Stack) at
locations from $C0 through $FF.
6.4. Map of Memory and I/Os
© Sunplus Technology Co., Ltd.
Proprietary & Confidential
*NMI SOURCE:
*I/O PORT:
- I/O CONFIG
- PORT IOC
- INTA (from TIMER A)
- INTA (from TIMER A)
- INTB (from TIMER B)
- CPU CLK / 1024
- CPU CLK / 8192
- CPU CLK / 65536
- EXT INT
IOD
$0005
$0004
$0000
$0001
$0FFFF
$000C0
$0E000
$08000
*MEMORY MAP (From ROM view)
$00000
$00100
$00200
$00600
SUNPLUS TEST PROGRAM
USER RAM and STACK
USER'S PROGRAM &
HW register, I/Os
ROM BANK #1
SPC41B2 is able to
ROM BANK #0
DUMMY AREA
DATA AREA
UNUSED
5
6.5. I/O Port Configuration*
* Values shown are for VDD = 5.0V test conditions only.
Input/Output IOD port : IOD7 - 4
Input/Output IOD port : IOD3 - 0
Input/Output IOC port : IOC3 - 0
OD : Open Drain
OD : Open Drain
input data
input data
OD : Open Drain
input data
logic_4
control
logic_2
logic_3
control
control
output
output
output
data
data
data
OD-NMOS
OD-PMOS
OD-PMOS
buffer or
or buffer
or buffer
SPC41B2
VDD
60K
60K
60K
SEP. 05, 2001
Version: 1.3