ADP172 Analog Devices, Inc., ADP172 Datasheet - Page 5

• Manufacturer Part Number: ADP172
• Description: 300 Ma, Low Quiescent Current, Cmos Linear Regulator
• Manufacturer: Analog Devices, Inc.

ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
VIN to GND
VOUT to GND
EN to GND
Storage Temperature Range
Operating Junction Temperature Range
Operating Ambient Temperature Range
Soldering Conditions
Stresses above those listed under absolute maximum ratings
may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or
any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL DATA
Absolute maximum ratings apply only individually, not in
combination. The ADP172 can be damaged when the junction
temperature limits are exceeded. Monitoring ambient
temperature does not guarantee that T
temperature limits. In applications with high power dissipation
and poor thermal resistance, the maximum ambient temperature
may have to be derated.
In applications with moderate power dissipation and low PCB
thermal resistance, the maximum ambient temperature can
exceed the maximum limit as long as the junction temperature
is within specification limits. The junction temperature (T
the device is dependent on the ambient temperature (T
power dissipation of the device (P
ambient thermal resistance of the package (θ
Maximum junction temperature (T
ambient temperature (T
following formula:
Junction-to-ambient thermal resistance (θ
based on modeling and calculation using a 4-layer board. The
junction-to-ambient thermal resistance is highly dependent on
T
J
= T
A
+ (P
D
× θ
JA
)
A
) and power dissipation (P
D
), and the junction-to-
J
) is calculated from the
J
is within the specified
JA
) of the package is
JA
Rating
−0.3 V to +4.0 V
−0.3 V to VIN
−0.3 V to +4.0 V
−65°C to +150°C
−40°C to +125°C
−40°C to +85°C
JEDEC J-STD-020
).
D
) using the
A
), the
J
) of
Rev. A | Page 5 of 20
the application and board layout. In applications where high
maximum power dissipation exists, close attention to thermal
board design is required. The value of θ
on PCB material, layout, and environmental conditions. The
specified values of θ
Refer to JESD51-7 for detailed information regarding board
construction.
Ψ
with units of °C/W. The Ψ
and calculation using a 4-layer board. The Guidelines for Reporting
and Using Electronic Package Thermal Information: JESD51-12
states that thermal characterization parameters are not the same
as thermal resistances. Ψ
through multiple thermal paths rather than a single path as in
thermal resistance, θ
convection from the top of the package as well as radiation from
the package—factors that make Ψ
applications. Maximum junction temperature (T
from the board temperature (T
using the formula
Refer to JESD51-8 and JESD51-12 for more detailed information
about Ψ
THERMAL RESISTANCE
θ
device soldered in a circuit board for surface-mount packages.
Table 4. Thermal Resistance
Package Type
4-Ball, 0.5 mm Pitch WLCSP
ESD CAUTION
JA
JB
and Ψ
is the junction-to-board thermal characterization parameter
T
J
= T
JB
.
JB
B
are specified for the worst-case conditions, that is, a
+ (P
D
× Ψ
JA
JB
JB
are based on a 4-layer, 4 in. × 3 in. PCB.
. Therefore, Ψ
)
JB
measures the component power flowing
JB
of the package is based on modeling
B
θ
260
) and power dissipation (P
JA
JB
more useful in real-world
JB
thermal paths include
JA
may vary, depending
Ψ
58
JB
J
) is calculated
ADP172
Unit
°C/W
D
)