AD8223 Analog Devices, AD8223 Datasheet - Page 13

• Manufacturer Part Number: AD8223
• Description: Single Supply, Rail-to-Rail, Low Cost Instrumentation Amplifier
• Manufacturer: Analog Devices

Preliminary Technical Data
THEORY OF OPERATION
AMPLIFIER ARCHITECTURE
The AD8223 is an instrumentation amplifier based on a
classic 3-op amp approach, modified to assure operation
even at common-mode voltages at the negative supply rail.
The architecture allows lower voltage offsets, better CMRR,
and higher gain accuracy than competing instrumentation
amplifiers in its class.
Figure 29 shows a simplified schematic of the AD8223. The
AD8223 has three stages. In the first stage, the input signal is
applied to PNP transistors. These PNP transistors act as voltage
buffers and allow input voltages below ground. The second
stage consists of a pair of 8 kΩ resistors, the R
pair of amplifiers. This stage allows the amplification of the
AD8223 to be set with a single external resistor. The third stage
is a differential amplifier composed of an op amp, two 10 kΩ
resistors, and two 50 kΩ resistors. This stage removes the
common mode signal and applies an additional gain of 5.
The transfer function of the AD8223 is
where:
V
G
OUT
=
INVERTING
INVERTING
5 +
= G(V
GAIN
NON-
2
1
8
3
0 8
NEGATIVE SUPPLY
POSITIVE SUPPLY
R
IN+
kΩ
G
Figure 29. Simplified Schematic
− V
4
7
4
7
IN−
) + V
+
–
–
+
8kΩ
8kΩ
REF
10kΩ
10kΩ
+
–
50kΩ
50kΩ
G
resistor, and a
OUT
REF
6
5
Rev. PrA | Page 13 of 20
GAIN SELECTION
Placing a resistor across the R
AD8223, which can be calculated by referring to Table 5 or by
using the following gain equation:
Table 5. Gains Achieved Using 1% Resistors
1% Standard Table
Value of R
26.7k
15.8k
5.36k
2.26k
1.78k
845
412
162
80.6
The AD8223 defaults to G = 5 when no gain resistor is used.
The tolerance and gain drift of the R
to the specifications of the AD8223 to determine the total gain
accuracy of the system. When the gain resistor is not used,
gain error and gain drift are kept to a minimum.
INPUT VOLTAGE RANGE
The 3-op amp architecture of the AD8223 applies gain and then
removes the common-mode voltage. Therefore, internal nodes
in the AD8223 experience a combination of both the gained
signal and the common-mode signal. This combined signal can
be limited by the voltage supplies even when the individual input
and output signals are not. To determine whether the signal can be
limited, refer to Figure 15 through Figure 18. Alternatively, use
the parameters in the Specifications section to verify that the
input and output are not limited and then use the following
formula to make sure the internal nodes are not limited:
To check if it is limited by the internal nodes,
If more common-mode range is required, a solution is to apply less
gain in the instrumentation amplifier and more in a later stage.
R
−
G
V
S
=
+
G
80
G
. 0
(Ω)
01
−
kΩ
5
V
<
0
6 .
+
V
CM
Desired Gain
8
10
20
40
50
100
200
500
1000
±
G
terminals sets the gain of the
V
DIFF
10
G
×
resistor should be added
Gain
<
Calculated Gain
7.99
10.1
19.9
40.4
49.9
99.7
199
499
998
+
V
S
−
AD8223
0
1 .
V