RTL8181 ETC, RTL8181 Datasheet - Page 18

• Manufacturer Part Number: RTL8181
• Description: Wireless LAN Access Point/Gateway Controller
• Manufacturer: ETC

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There are two registers for the interrupt control. The GIMR register can enable/disable the interrupt source. The GISR shows
the pending interrupt status.
Interrupt Control Register Set
Virtual address Size (byte) Name
0xBD01_0000
0xBD01_0004
Global Interrupt Mask Register (GIMR)
Bit
0
1
2
3
4
5
6
7
8
Global Interrupt Status Register (GISR)
Bit
0
1
2
3
4
5
6
7
8
7. Memory Controller
RTL8181 provides a memory control module that could access external asynchronous SDRAM and flash memory.
RTL8181 could interface to PC100 or PC133-compliant SDRAM, and supports with auto-refresh mode, which requires
4096-cycle refresh in 64 ms. The SDRAM could be accessed in two banks (CS0#, and CS1#), and its size and timing are
configurable in register. The data width of SDRAM could be chosen as 16-bit or 32-bit in register as well. If 32-bit is
configured, 2 banks of 16-bit SDRAM may be used to expand its data width to 32 bits or use one bank of 32-bit SDRAM is
allowable.
CONFIDENTIAL
Bit Name
TCIE
GPIOIE
WLAIE
UARTIE
ETH0IE
ETH1IE
PCIIE
Reserved
LBC1E
Bit Name
TCIP
GPIOIP
WLAIP
UARTIP
ETH0IP
ETH1IP
PCIIP
Reserved
LBCIP
2
2
Description
Timers/Counters interrupt enable.
0: Disable, 1: Enable
GPIO interrupt enable.
0: Disable, 1: Enable
WLAN controller interrupt enable.
0: Disable, 1: Enable
UART interrupt enable.
0: Disable 1: Enable
Ethernet0 interrupt enable.
0: Disable, 1: Enable
Ethernet1 interrupt enable.
0: Disable, 1: Enable
PCI interrupt enable.
0: Disable, 1: Enable
LBC time-out interrupt enable.
0: Disable, 1: Enable
Description
Timers/Counters interrupt pending flag.
0: no pending, 1: pending
GPIO interrupt pending flag.
0: no pending, 1: pending
WLAN controller interrupt pending flag.
0: no pending, 1: pending
UARTI interrupt pending flag.
0: no pending, 1: pending
Ethernet0 interrupt pending flag.
0: no pending, 1: pending
Ethernet1 interrupt pending flag.
0: no pending, 1: pending
PCI interrupt pending flag.
0: no pending, 1: pending
LBC time-out interrupt pending flag.
0: no pending, 1: pending
GIMR
GISR
Description
Global interrupt mask register
Global interrupt status register
18
R/W
R
R
R
R
R
R
R
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
InitVal
0
0
0
0
0
0
0
0
InitVal
0
0
0
0
0
0
0
0
RTL8181
v1.0