MCP6L71 Microchip Technology Inc., MCP6L71 Datasheet - Page 13

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MCP6L71

Manufacturer Part Number
MCP6L71
Description
2 Mhz, 150 ?a Op Amps
Manufacturer
Microchip Technology Inc.
Datasheet

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4.0
The
manufactured using Microchip’s state of the art CMOS
process, specifically designed for low cost, low power
and general purpose applications. The low supply
voltage, low quiescent current and wide bandwidth
make the MCP6L71/1R/2/4 ideal for battery powered
applications.
4.1
4.1.1
The MCP6L71/1R/2/4 op amps are designed to pre-
vent phase inversion when the input pins exceed the
supply voltages.
exceeding both supplies without any phase reversal.
4.1.2
In order to prevent damage and/or improper operation
of these amplifiers, the circuit they are in must limit the
currents (and voltages) at the input pins (see
Section 1.1 “Absolute Maximum Ratings †”).
Figure 4-1
tecting these inputs. The internal ESD diodes prevent
the input pins (V
ground, and the resistors R
current drawn out of the input pins. Diodes D
prevent the input pins (V
far above V
FIGURE 4-1:
Inputs.
A significant amount of current can flow out of the
inputs (through the ESD diodes) when the common
mode voltage (V
Figure
need to limit the usable voltage range.
© 2009 Microchip Technology Inc.
V
V
1
2
MCP6L71/1R/2/4
2-7. Applications that are high impedance may
APPLICATION INFORMATION
Rail-to-Rail Inputs
R
R
shows the recommended approach to pro-
1
2
R
R
DD
PHASE REVERSAL
INPUT VOLTAGE AND CURRENT
LIMITS
>
>
D
1
2
, and dump any currents onto V
1
V
V
IN
SS
SS
D
Figure 2-10
+ and V
2
CM
– (minimum expected V
– (minimum expected V
) is below ground (V
Protecting the Analog
MCP6L7X
IN
IN
family
+ and V
2 mA
2 mA
–) from going too far below
1
V
R
and R
shows an input voltage
DD
3
of
IN
2
–) from going too
limit the possible
op
1
2
)
)
amps
SS
1
DD
V
and D
OUT
); see
.
is
2
4.1.3
The input stage of the MCP6L71/1R/2/4 op amps uses
two differential CMOS input stages in parallel. One
operates at low common mode input voltage (V
while the other at high V
room temperature, the device operates with V
0.3V above V
+25°C).
The transition between the two input stage occurs
when V
gain linearity, with non-inverting gains, avoid this region
of operation.
4.2
The output voltage range of the MCP6L71/1R/2/4 op
amps is V
(maximum) when R
and V
tion.
4.3
Driving large capacitive loads can cause stability
problems for voltage feedback op amps. As the load
capacitance increases, the feedback loop’s phase
margin decreases and the closed-loop bandwidth is
reduced. This produces gain peaking in the frequency
response, with overshoot and ringing in the step
response.
When driving large capacitive loads with these op
amps (e.g., > 100 pF when G = +1), a small series
resistor at the output (R
feedback loop’s phase margin (stability) by making the
output load resistive at higher frequencies. The
bandwidth will be generally lower than the bandwidth
with no capacitive load.
FIGURE 4-2:
Stabilizes Large Capacitive Loads.
Bench measurements are helpful in choosing R
Adjust R
Figure
DD
R
2-15) has reasonable overshoot (e.g., 4%).
R
CM
ISO
G
N
Rail-to-Rail Output
= 5.0V. Refer to
Capacitive Loads
DD
= V
MCP6L71/1R/2/4
NORMAL OPERATIONS
so that a small signal step response (see
– 20 mV (minimum) and V
DD
DD
MCP6L7X
– 1.1V. For the best distortion and
and 0.3V below V
L
R
= 10 kΩ is connected to V
F
Output Resistor, R
ISO
CM
Figure 2-13
in
. With this topology, and at
Figure
R
C
ISO
L
DS22145A-page 13
4-2) improves the
for more informa-
SS
(typically at
SS
ISO
V
CM
+ 20 mV
OUT
up to
DD
CM
ISO
/2
),
.

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