SSD1730 Solomon, SSD1730 Datasheet - Page 18

• Manufacturer Part Number: SSD1730
• Description: SSD1730 MLA Power Chip CMOS
• Manufacturer: Solomon

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-V1 and +V1 Discharge Circuit
When XSLP is set to VSS level, the internal –V1 discharge circuit will be triggered and the residual charge at the
row driver negative voltage-side power supply voltage terminal –V1 will be discharged to the VSS level. However,
the residual charge at the row driver positive voltage-side power supply terminal +V1 can be discharged to the VSS
level through an external MOS transistor. Figure 11 shows the typical connection of the +V1 discharge circuit.
Figure 11 - Typical connection of +V1 discharge circuit
Power Up and Power Down Sequence
Proper power up sequence and power down sequence are recommended to protect the display system and to have
better performance.
Power Up Sequence:
Start – Turn on the logic system in the application and power up the SSD1730
Display off – Set Column and Row Driver DOFF# to “L”
Initialization – Send LP, YD, XSCL and Data
Stable – Wait for the power levels getting stable (around 80ms)
Display on – Set Column and Row Driver DOFF# to “H”
Power Down Sequence:
Display off – Set Column and Row Driver DOFF# to “L”
Sleep mode – Set power chip to sleep mode by setting XSLP to “L”
Discharge – Wait for the discharge of the display system (around 50ms)
Power down – Cut the power of the SSD1730
End – Turn off the logic system of the application
#
SOLOMON
Depends on the system loading.
XSLP
VSS
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3.3M
2SK
2SK
#
VH
+V1
Rev 2.0
04/2002
#
SSD1730
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