STC62WV12816 STC, STC62WV12816 Datasheet - Page 2

• Manufacturer Part Number: STC62WV12816
• Description: Very Low Power/Voltage CMOS SRAM 128k X 16 bit
• Manufacturer: STC

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R0201-STC62WV12816
A0-A16 Address Input
CE Chip Enable Input
WE Write Enable Input
OE Output Enable Input
LB and UB Data Byte Control Input
DQ0 - DQ15 Data Input/Output
Ports
Vcc
Gnd
Output Disabled
PIN DESCRIPTIONS
TRUTH TABLE
(Power Down)
Not selected
MODE
Read
Write
STC
Name
CE
H
X
L
L
L
L
WE
H
H
X
X
X
L
OE
H
X
X
X
X
L
These 17 address inputs select one of the 131,072 x 16-bit words in the RAM.
The write enable input is active LOW and controls read and write operations. With the
chip selected, when WE is HIGH and OE is LOW, output data will be present on the
DQ pins; when WE is LOW, the data present on the DQ pins will be written into the
selected memory location.
The output enable input is active LOW. If the output enable is active while the chip is
selected and the write enable is inactive, data will be present on the DQ pins and they
will be enabled. The DQ pins will be in the high impedance state when OE is inactive.
Lower byte and upper byte data input/output control pins.
These 16 bi-directional ports are used to read data from or write data into the RAM.
Power Supply
Ground
CE is active LOW. Chip enables must be active when data read from or write to the
device. if chip enable is not active, the device is deselected and is in a standby power
mode. The DQ pins will be in the high impedance state when the device is deselected.
LB
X
H
X
H
H
H
L
L
L
L
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UB
H
H
H
X
H
X
L
L
L
L
2
D0~D7
High Z
High Z
High Z
High Z
High Z
Dout
Dout
Din
Din
X
Function
D8~D15
High Z
High Z
High Z
High Z
High Z
Dout
Dout
Din
Din
X
STC62WV12816
Vcc CURRENT
I
I
CCSB
CCSB
I
I
I
I
I
I
I
I
, I
, I
CC
CC
CC
CC
CC
CC
CC
CC
CCSB1
CCSB1
Revision 1.1
Jan.
2004