AN2798 Freescale Semiconductor / Motorola, AN2798 Datasheet - Page 5

• Manufacturer Part Number: AN2798
• Description: Migrating from the MPC855T to the MPC885
• Manufacturer: Freescale Semiconductor / Motorola

5.1 Pinout
Both the MPC855T and the MPC885 use the 357 plastic ball grid array (PBGA) package. Buses and other functions
were grouped in a logical order, but reuse of layout is not available. Parallel ports changed from four (Port A, B, C,
and D) on the MPC855T to five (Port A, B, C, D, and E) on the MPC885. Each signal in the I/O ports can be
configured as a general-purpose I/O signal or as a signal dedicated to supporting communications peripherals, such
as Ethernet or USB. See the MPC885 PowerQUICC Family Reference Manual for more information.
Figure 3
Freescale Semiconductor
MII_MDIO
PB28
shows the MPC885 pinout.
BSA2
PB27
PB29
PC15
WE3
A10
A14
A27
A21
A25
A18
A26
19
A2
A3
A7
TMS
PB14
PC12
PC14
PB30
BSA1
TRST
WE0
A11
A16
A29
A30
A28
A31
A1
A5
A9
OE
18
A19
GPL_AB3
GPL_A0
PB25
TCK
TSIZ1
BSA0
PA10
TDO
PB26
PA14
WE2
N/C
A12
A15
A20
A23
A22
17
A4
A8
GPL_AB2
TSIZ0
TDI
BSA3
PB24
GND
PA12
PA15
PB23
WE1
A13
A17
A24
CS4
CS7
CS5
PC11
16
A0
A6
VDDL
CE2_A
CE1_A
VDDH
VDDH
VDDL
VDDL
VDDL
CS6
CS2
PC10
15
PA8
PA9
PB22
Migrating from the MPC855T to the MPC885, Rev. 0
NOTE: This is the top view of the device.
GPL_B4
VDDH
VDDH
PB21
VDDL
CS3
CS1
CS0
14
PC8
PA7
PC9
GPL_A5
GPL_A4
PB19
GND
GND
BDIP
PB20
GND
PA5
PA6
WR
13
Figure 3. MPC885 Pinout
MII1_COL
VDDL
PB17
PB18 MII1_CRS
PC7
TEA
TS
12
TA
BI
Similarities and Differences between the MPC855T and the MPC885
VDDH
PB16
VDDL
PA13
IRQ3
PC6
BR
BG
BB
11
BURST
VDDH
PC13
PB15
GND
IRQ6
IRQ2
IPB5
PC4
PC5
GND
GND
10
VDDL
VDDH
VDDL
PA11
PE21
PE31
IPB1
IPB3
IPB4
IPB0
PD3
9
PE17
PE24
PD15
PE29
ALEB
IPB2
IPB7
IPB6
8
BADDR30 MODCK2 EXTCLK
PD14
ALEA
PE30
PE14
PE16
IRQ4
GND
GND
AS
7
MODCK1 EXTAL
VDDH
VDDH
PE15
PD13
PE19 MII1_TXEN
VDDL
GND
PD5
OP1
OP0
6
BADDR28
BADDR29
VDDL
VDDH
VDDL
VDDL
VDDH
VDDL
PE28
PD12
PD6
5
RSTCONF
CLKOUT
VSSSYN
HRESET
PE20
IRQ7
TEXP
PE27
XTAL
D17
IPA2
PD4
D22
D28
PA4
PA2
IRQ0
D9
4
D5
PORESETVDDLSYN
SRESET WAIT_A
WAIT_B VSSSYN1
PB31
PE25
IRQ1
PD7
D12
IPA3
IPA7
PA0
PD8
D10
D19
D26
D31
D23
D6
3
D14
PD10
PE23
D13
PD9
PD11
D11
D16
D20
D24
IPA6
IPA4
PA3
D0
D27
D3
D7
2
PE22
PE26
IPA5
IPA1
IPA0
D15
D18
D21
D25
D29
D30
PA1
PE18
D4
D2
D1
1
D8
W
M
U
R
N
H
G
D
C
V
T
P
K
F
E
B
A
L
J
5