AN2768 Freescale Semiconductor / Motorola, AN2768 Datasheet - Page 23

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AN2768

Manufacturer Part Number
AN2768
Description
Implementation of a 128-Point FFT on the MRC6011 Device
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
Figure 21 shows that the largest magnitude occurs when the vectors B
B
A and B
It should also be clear that either the magnitude of C or the magnitude of D is at least equal to the magnitude of the
larger of the two vectors A and B. This leads to the relationship:
We can see that the complex numbers at the output stages of the butterflies grow in magnitude from stage to stage.
The maximum growth as given by Equation 13 is a factor of two per stage or one bit-per-pass.
4.1 Input Data Analysis
The MRC6011 device is a fixed-point processor that uses 16 bits to represents integers
implemented on the MRC6011 device, the internal results of the FFT must not exceed these values at any one time.
The previous discussion shows that the magnitude of the complex numbers can grow by a total factor of N or
bits in an N-point FFT. Because of the twiddle factor rotation, real and imaginary parts of the complex numbers can
Freescale Semiconductor
´
and A point in the same direction) or D (B
´
.
max A B
Implementation of a 128-Point FFT on the MRC6011 Device, Rev. 0
B
(
Figure 20. Vector Representation of the DIT Butterfly
q
Figure 21. Bounds on Butterfly Output Magnitude
,
) max C D
–B´
´
(
and A point in opposite directions) is the sum of the magnitudes of
A
,
C
) 2max A B
B
D
θ
θ
(
´
,
and A line up so that the magnitude of C (if
B
)
A
C
Fixed-Point and Precision Issues
1.0
x
<
A
1
. When an FFT is
Equation 13
log
D
2
N
23

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