AN2575 Freescale Semiconductor / Motorola, AN2575 Datasheet - Page 4

• Manufacturer Part Number: AN2575
• Description: MC68HC908EY16 ESCI LIN Drivers
• Manufacturer: Freescale Semiconductor / Motorola

AN2575/D
4
One method of initially trimming the ICG is fully described in AN2498/D (see
the
up with a value that is stored in FLASH and loaded into the ICGTR register.
This value can be either embedded into the code (as shown in the software
listing) or stored in a pre-defined FLASH location and transferred to ICGTR on
power-up. With this pre-trimming done on an MC68HC908EY16, the frequency
is guaranteed to be within ±7% for 4.5 to 5.5 V V
for the full automotive temperature range). This is well within the ±14%
requirement to enable the MCU to recognize the 13-bit break.
The trimming adjustment involves measuring the actual bus frequency with the
use of an external pulse of known length. Then, the trim register is adjusted by
the number that gives the required correction. (Note that changing its value by
1 causes a frequency change of ~0.195%.) In the case of AN2498/D, the
external pulse is 1024 µs between successive rising edges. The number of
4915.2-kHz bus cycles that would occur in this period is given by:
The adjustment to the ICGTR is made using the following equation where
delta0 is the actual number of counts (measured by timer A channel 0) between
successive rising edges of the external 1024 µs signal.
Independent of how the initial trimming is done, the improved accuracy
achieved by this initial ICG pre-trimming allows the break to be recognized. It
is, however, not sufficiently accurate to meet the ±2% specification required to
guarantee reliable LIN communication. Adjustment to within ±1% can be
achieved using the LIN message itself because the synchronization byte of $55
immediately following the break has been incorporated for this purpose.
Because the baud rate is always known, the time between edges within this
byte can be used to measure the precise bit-time relative to the actual clock
frequency. In particular, the time between two successive negative edges
yields a known reference of two bit-times. The use of the same edge for the
start and finish of the measurement eliminates inaccuracies due to asymmetry
between rising and falling edges. The negative edge is preferred because it is
generated by a dominant, active-low logic level. This is more accurate than the
use of positive edges which are generated by pullup resistors.
Freescale Semiconductor, Inc.
References
For More Information On This Product,
cnt1024 = (64 × 307.2 kHz × 1024 µs) ÷ 4 ÷ 1000 = 5033
ICGTR = ICGTR + (512 × (delta0 – 5033)) ÷ 5033
MC68HC908EY16 ESCI LIN Drivers
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section). This trimming would usually be done only on power-
DD
and –40°C to +85°C (±10%
MOTOROLA