AN2524 Freescale Semiconductor / Motorola, AN2524 Datasheet - Page 13

• Manufacturer Part Number: AN2524
• Description: DC Motor with Dead-Time Correction TPU Function Set
• Manufacturer: Freescale Semiconductor / Motorola

MOTOROLA
DC Motor with Dead-Time Correction TPU Function Set (DCmDt)
The minimum pulse width can be calculated according to
These illustrate two possible worst cases of timing in the case when only
DCmDt function is running on one TPU.
According to the
Figure 7
value is equal to 28 IMB clock cycles – DT, with a minimum value of at least 16
IMB clock cycles.
Note that the MPW, as well as the DT, are entered into the parameter RAM in
TCR1 clock cycles rather that IMB clock cycles. It is recommended for the
DCm2 function, to configure the TCR1 clock to its maximum speed, which is
the IMB clock divided by 2. In this case the MPW = 14 – DT, with a minimum
value of 8.
When other functions are running concurrently on the same TPU, the longest
state of each function with its time-slot transition can increase the calculated
MPW value. The DCmDt_fault function does not affect the MPW. The
DCmDt_sync, if used, increase the MPW value by 22 (44 IMB clock cycles).
The DCmDt_res, if used, increase the MPW value by 20 (40 IMB clock cycles).
If a value lower than the one calculated is assigned to the MPW parameter, the
motion system can run with a higher motor voltage amplitude, but with a very
low probability risk that the dead-time is not kept.
time slot
sequence
SW1
SW2
Freescale Semiconductor, Inc.
latency
For More Information On This Product,
the MPW is 16 IMB clock cycles. In summary the MPW parameter
Go to: www.freescale.com
LH
LH
Figure 6
DT
Figure 7. Worst case timing – case two
the MPW is 28 IMB clock cycles – DT. According to
MPW
C10
C10
DT
Detailed Function Description
Figure 6
or
Figure
AN2524/D
7.
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