AN2405 Freescale Semiconductor / Motorola, AN2405 Datasheet - Page 6

• Manufacturer Part Number: AN2405
• Description: Supplemental Information for LCD Interfacing for the MC9328MX1 Application Processor Application Note
• Manufacturer: Freescale Semiconductor / Motorola

Timing
4.2
The LCDC supports TFT panel interfaces for active matrix LCD panels. The i.MX processor supports two types of
TFT panels: the Sharp TFT panels that require the special timing signals SPL/SPR, CLS, PS, and REV and
standard TFT interface panels. This sections discusses the latter type of panels.
6
• VSYNC, HSYNC, and LSCLK can be programmed as active high or active low. In the timing diagram above, all 3
• Ts is the shift clock period.
• Ts = Tpix * (panel data bus width).
• Tpix is the Pixel Clock Period (LSCLK) which equals
• To calculate the maximum frequency required for the LSCLK to operate on a passive LCD panel so that the LD
signals are active high.
output is correct, use the following formulas:
LSCLK (12 bpp) < 1/9 HCLK
LSCLK (8 bpp/4 bpp) < 1/15 HCLK
Symbol
TFT Panel Timing
T1
T2
T3
T4
i.MX Supplemental Information for LCD Interfacing Application Note, Rev. 1.1
HSYNC to VSYNC delay
HSYNC pulse width
VSYNC to SCLK
SCLK to HSYN
Parameter
Table 3. Non-TFT Panel Timing
-----------------------------------
8
×
Allowed Register
Minimum Value
(
PCD
1
+
0
0
0
–
1
)
× LCDC_CLK
Actual Value
HWAIT2+2
HWIDTH+1
HWAIT1+1
0
≤
T3
.
≤
Ts
Freescale Semiconductor
Unit
Tpix
Tpix
Tpix