A1280A Actel, A1280A Datasheet - Page 13

• Manufacturer Part Number: A1280A
• Description: (A1225A - A1280A) FPGAs
• Manufacturer: Actel

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A C T
A 12 25 A Ti m i ng Ch a r ac t e r i s t i cs
( W or st -C as e C om m er cia l Cond it ion s)
Input Module Propagation Delays
Parameter
t
t
t
t
Input Module Predicted Routing Delays
t
t
t
t
t
Global Clock Network
t
t
t
t
t
t
t
t
f
Note:
1.
INYH
INYL
INGH
INGL
IRD1
IRD2
IRD3
IRD4
IRD8
CKH
CKL
PWH
PWL
CKSW
SUEXT
HEXT
P
MAX
™
These parameters should be used for estimating device performance. Optimization techniques may further reduce delays by 0 to 4 ns.
Routing delays are for typical designs across worst-case operating conditions. Post-route timing analysis or simulation is required to
determine actual worst-case performance. Post-route timing is based on actual routing delay measurements performed on the device
prior to shipment.
2 F a m il y F PG A s
Description
Pad to Y High
Pad to Y Low
G to Y High
G to Y Low
FO=1 Routing Delay
FO=2 Routing Delay
FO=3 Routing Delay
FO=4 Routing Delay
FO=8 Routing Delay
Input Low to High
Input High to Low
Minimum Pulse Width
High
Minimum Pulse Width
Low
Maximum Skew
Input Latch External
Setup
Input Latch External
Hold
Minimum Period
Maximum Frequency
1
FO = 32
FO = 256
FO = 32
FO = 256
FO = 32
FO = 256
FO = 32
FO = 256
FO = 32
FO = 256
FO = 32
FO = 256
FO = 32
FO = 256
FO = 32
FO = 256
FO = 32
FO = 256
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(continued)
Min.
11.2
3.4
3.8
3.4
3.8
0.0
0.0
7.0
7.7
8.1
v4.0
‘–2’ Speed
130.0
125.0
Max.
10.2
11.8
10.2
12.0
2.9
2.6
5.0
4.7
4.1
4.6
5.3
5.7
7.4
0.7
3.5
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Min.
11.2
4.1
4.5
4.1
4.5
0.0
0.0
7.0
8.3
8.8
‘–1’ Speed
120.0
115.0
Max.
13.0
13.2
11.0
11.0
3.3
3.0
5.7
5.4
4.6
5.2
6.0
6.4
8.3
0.7
3.5
Min.
11.2
10.0
4.5
5.0
4.5
5.0
0.0
0.0
7.0
9.1
‘Std’ Speed
110.0
100.0
Max.
12.8
15.7
12.8
15.9
3.8
3.5
6.6
6.3
5.4
6.1
7.1
7.6
9.8
0.7
3.5
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
s
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