AN1921 Motorola / Freescale Semiconductor, AN1921 Datasheet - Page 3

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AN1921

Manufacturer Part Number
AN1921
Description
AN1921 General DSP568xx Interface Examples using the Embedded SDK
Manufacturer
Motorola / Freescale Semiconductor
Datasheet
The DSP56824 provides a number of interfaces: Port A provides for access to external memory
located on the EVM. It also provides another interface, referred to as Port B, which has 16 general
purpose I/O lines. Each of the lines are user-controlled and can be directed as either input or output.
The lower eight lines can generate interrupts based on the rising or falling edge of a signal. A third
interface, referred to as Port C, can be either GPIO lines or can be allocated to timers, two SPI (Serial
Peripheral Interfaces) ports and an SSI (Synchronous Serial Interface) port.
The SPI port is an independent, serial communication subsystem that allows the DSP56824 to
communicate synchronously with peripheral devices such as LCD drivers, A/D and D/A subsystems,
and microprocessors. The SPI can be configured as either a master or a slave device with high data
rates. In master mode, a transfer is initiated when data is written to the SPI data register (SPDR). In
slave mode, a transfer is initiated by the reception of a clock signal.
Clock control logic allows a selection of clock polarity and a choice of two fundamentally different
clocking protocols to accommodate most available synchronous serial peripheral devices. In some
cases, the phase and polarity are changed between transfers to allow a master device to communicate
with peripheral slaves having different requirements. When the SPI is configured as a master, software
selects one of eight different bit rates for the clock.
On the DSP56824EVM board, the chip’s SPI1 port is optionally interfaced by means of the jumpers
placed at the board’s J2 header to MAXIM’s MAX3100 UART. In this case, the MAX3100 provides
an interface between the SPI and RS-232 interfaces.
The EVM provides a 9-pin Sub-D connector to attach a serial cable. Direct access to the SPI1 is
possible by removing the jumpers at J2.
SPI0 Port Access – J1
Figure 3. The DSP56824EVM board used in this note, with annotations added
Serial (RS-232) tied to SPI1 Port by J2
Interface Examples Using the Embedded SDK
Table 1
describes the pins found at J2.
LCD and Keypad User Interface Description
Access to
DSP’s SPI1
port
controlled by
jumpers on J2
3

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