AN1915D Freescale Semiconductor / Motorola, AN1915D Datasheet - Page 2

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AN1915D

Manufacturer Part Number
AN1915D
Description
3-Phase BLDC Motor Control with Quadrature Encoder using DSP56F80x
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
2
Motorola DSP Advantages and Features
2.
The Motorola DSP56F80x family is well suited for digital motor control, combining the DSP’s
calculation capability with the MCU’s controller features on a single chip. These DSPs offer many
dedicated peripherals, such as Pulse Width Modulation (PWM) module, Analog-to-Digital Converter
(ADC), Timers, communication peripherals (SCI, SPI, CAN), on-board Flash and RAM. Generally, all
family members are well-suited for various motor controls.
A typical member of the family, the DSP56F805, provides the following peripheral blocks:
In addition to the fast Analog-to-Digital converter and the 16-bit Quad Timers, the most interesting
peripheral from the BLDC motor control point of view is the Pulse Width Modulation (PWM) module.
The PWM module offers a high degree of freedom in its configuration, permitting efficient control of
the BLDC motor.
The PWM has the following features:
Motorola DSP Advantages and Features
Program Flash
Program RAM
Data Flash
Boot Flash
Data RAM
Two Pulse Width Modulator modules (PWMA & PWMB), each with six PWM outputs, three
Current Sense inputs, and four Fault inputs, fault tolerant design with deadtime insertion,
supporting both center- and edge- aligned modes
Twelve-bit Analog-to-Digital Converters (ADCs), supporting two simultaneous conversions
with dual 4-pin multiplexed inputs; the ADC can be synchronized by PWM modules
Two Quadrature Decoders (Quad Dec0 & Quad Dec1), each with four inputs, or two
additional Quad Timers A & B
Two dedicated General Purpose Quad Timers totaling 6 pins: Timer C with 2 pins and Timer
D with 4 pins
CAN 2.0 A/B Module with 2-pin ports used to transmit and receive
Two Serial Communication Interfaces (SCI0 & SCI1), each with two pins, or four additional
GPIO lines
Serial Peripheral Interface (SPI), with a configurable 4-pin port, or four additional GPIO lines
Computer Operating Properly (COP) timer
Two dedicated external interrupt pins
Fourteen dedicated General Purpose I/O (GPIO) pins, 18 multiplexed GPIO pins
External reset pin for hardware reset
JTAG/On-Chip Emulation (OnCE)
Software-programmable, Phase Lock Loop-based frequency synthesizer for the DSP core
clock
Three complementary PWM signal pairs, or six independent PWM signals
3-Phase BLDC Motor Control with Quadrature Encoder
Freescale Semiconductor, Inc.
8188 x 16-bit
DSP56F801
For More Information On This Product,
2K x 16-bit
1K x 16-bit
1K x 16-bit
2K x 16-bit
Table 2-1. Memory Configuration
Go to: www.freescale.com
32252 x 16-bit
DSP56F803
512 x 16-bit
4K x 16-bit
2K x 16-bit
2K x 16-bit
32252 x 16-bit
DSP56F805
512 x 16-bit
4K x 16-bit
2K x 16-bit
2K x16-bit
61436 x 16-bit
DSP56F807
8K x 16-bit
2K x 16-bit
4K x 16-bit
2K x 16-bit
MOTOROLA

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