AN1914 Freescale Semiconductor / Motorola, AN1914 Datasheet - Page 39

• Manufacturer Part Number: AN1914
• Description: 3-Phase BLDC Motor Control with Sensorless Back EMF Zero Crossing Detection Using DSP56F80x
• Manufacturer: Freescale Semiconductor / Motorola

7.3.1 Main SW States - General Overview
7.3.2 Initialize
Notes:
7.3.3 State Diagram - Process Application State Machine
The SW can be split into following processes:
as shown in
Application State Machine, which is the highest level (only the process Fault Control is on the same
level because of the motor emergency stop).
The status of all the processes after reset is defined in
In Main SW initialization provides following actions:
Process Application State Machine state diagram is displayed in
Machine controls the main application functionality.
The application can be controlled:
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Process Application State Machine
Process Commutation Control
Process Speed PI Controller
Process Current PI Controller
Process PWM Generation
Process PWM Generation
CmdApplication = 0
DriveFaultStatus = NO_FAULT
PCB Motor Set Identification
— boardId function is used to detect one of 3 possible hardware sets. According to used
ADC Initialization
Led diodes initialization
Switch (Start/Stop) initialization
Push Buttons (Speed up/down) initialization
Commutation control initialization
PWM initialization
PWM fault interrupts initialization
Zero Crossing inputs = Quadrature decoder filter initialization
Output Compare Timers initialization
The EVM board can be connected to the power stage boards. In order to assure the right
hardware is connected the board identification is performed. When inappropriate hardware is
detected the DriveFaultStatus|=WRONG_HARDWARE is set, motor remains stopped!
manually
from PC Master
hardware one of three control constant sets are loaded (functions EVM_Motor_Settings,
LV_Motor_Settings, HV_Motor_Settings)
Section
DSP56F80x MC PWM Module in Motor Control Applications
7.2. The general overview of the software states is in the State Diagram - Process
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Section
7.3.2.
Figure
7-6. Application State
SW Design
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