DS26502 Maxim Integrated Products, DS26502 Datasheet - Page 87
DS26502
Manufacturer Part Number
DS26502
Description
T1/E1/J1/64KCC BITS Element
Manufacturer
Maxim Integrated Products
Datasheet
1.DS26502.pdf
(124 pages)
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Register Name:
Register Description:
Register Address:
Bit #
Name
Default
HW
Mode
Bits 0, 3, 5 to 7: Unused, must be set = 0 for proper operation.
Bit 1: Transmit Open Circuit Detect Condition (TOCD). Set when the device detects that the TTIP and TRING outputs are
open-circuited. Note: This function not supported in transmit 6312kHz mode.
Bit 2: Transmit Current Limit Exceeded Condition (TCLE). Set when the 50mA (rms) current limiter is activated whether
the current limiter is enabled or not. Note: This function not supported in transmit CMI, 64kHz or 6312kHz mode.
Bit 4: Jitter Attenuator Limit Trip Event (JALT). Set when the jitter attenuator FIFO reaches to within 4 bits of its useful
limit. Will be cleared when read. Useful for debugging jitter-attenuation operation. Note: The jitter attenuator is only available
in T1 and E1 modes.
—
X
7
0
—
SR1
Status Register 1
14h
X
6
0
—
X
5
0
JALT
X
4
0
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—
X
3
0
TCLE
X
2
0
DS26502 T1/E1/J1/64KCC BITS Element
TOCD
X
1
0
—
X
0
0