DS2506S Dallas Semiconducotr, DS2506S Datasheet - Page 20

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DS2506S

Manufacturer Part Number
DS2506S
Description
64-kbit Add-Only Memory
Manufacturer
Dallas Semiconducotr
Datasheets

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DS2506
determines how long the DS2506 will hold the data line low overriding the 1 generated by the master. If
the data bit is a “1”, the device will leave the read data time slot unchanged.
PROGRAM PULSE
To copy data from the 8-bit scratchpad to the EPROM Data or Status Memory, a program pulse of
12 volts is applied to the data line after the bus master has confirmed that the CRC for the current byte is
correct. During programming, the bus master controls the transition from a state where the data line is
idling high via the pullup resistor to a state where the data line is actively driven to a programming
voltage of 12 volts providing a minimum of 10 mA of current to the DS2506. This programming voltage
(Figure 11) should be applied for 480 µs, after which the bus master returns the data line to an idle high
state controlled by the pullup resistor. Note that due to the high voltage programming requirements for
any 1-Wire EPROM device, it is not possible to multi-drop non-EPROM based 1-Wire devices with the
DS2506 during programming. An internal diode within the non-EPROM based 1-Wire devices will
attempt to clamp the data line at approximately 8 volts and could potentially damage these devices.
INITIALIZATION PROCEDURE “RESET AND PRESENCE PULSES” Figure 9
* In order not to mask interrupt signalling by other devices on the 1-Wire bus, t
+ t
should always be
RSTL
R
less than 960 µs.
READ/WRITE TIMING DIAGRAM Figure 10
Write-one Time Slot
20 of 25

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