DS2164Q Dallas Semiconducotr, DS2164Q Datasheet - Page 11

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DS2164Q

Manufacturer Part Number
DS2164Q
Description
G.726 ADPCM Processor
Manufacturer
Dallas Semiconducotr
Datasheet
DS2164Q
PCM AND ADPCM INPUT/OUTPUT
Since the organization of the input and output time slots on the DS2164Q does not depend on the
algorithm selected, it always assumes that PCM input and output are in 8-bit bytes and that ADPCM
input and output are in 4-bit bytes. Figure 12 demonstrates how the DS2164Q handles the I/O for the
three different algorithms. In the figure, it is assumed that channel X is in the compression mode
(CP/
= 1) and channel Y is in the expansion mode (CP/
= 0). Also, it is assumed that both the input
EX
EX
and output time slots for both channels are set to 0.
Figure 12. PCM AND ADPCM I/O EXAMPLE
Note 1: The bit after the LSB in the 24kbps ADPCM output is only a 1 when the DS2164Q is operated
in the software mode and is programmed to perform 24kbps compression; in all other configurations, it is
a 0.
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