DS17885 Dallas, DS17885 Datasheet - Page 4

• Manufacturer Part Number: DS17885
• Description: (DS17886 / DS17887) 3V/5V Real-Time Clock
• Manufacturer: Dallas

the time period during which data is written to the addressed register.
cycle for DS17885/DS17887 to be accessed.
timing. Bus cycles that take place with ALE asserted but without asserting
However, no data transfer occurs.
the DS17885/DS17887 that can be tied to the interrupt input of a processor. The
as long as the status bit causing the interrupt is present and the corresponding interrupt-enable bit is set.
To clear the
state.
When no interrupt conditions are present, the
interrupting devices can be connected to an
external pullup resistor. The voltage on the pullup supply should be no greater than V
control for the system power. With V
automatically activated from a kickstart input by the
system is powered on, the state of
can be connected through a pullup resistor to a positive supply. For 5V operation, the voltage of the
pullup supply should be no greater than 5.7V. For 3V operation, the voltage on the pullup supply should
be no greater than 3.9V.
be powered on in response to an active low transition on the
closure. V
function is used, and the
can be used as an interrupt input.
clearing of the 114 bytes of user RAM. When enabled,
present.
V
clock/calendar and user RAM if V
other energy source can be used. For 3V operation, V
5V operation, V
be grounded and the auxiliary-battery-enable bit bank 1, register 4BH, should = 0.
UL recognized to ensure against reverse charging current when used with a lithium battery. See
“Conditions of Acceptability” at www.maxim-ic.com/TechSupport/QA/ntrl.htm.
CS
WR
IRQ
PWR
KS
RCLR
BAUX
– Kickstart Input; Active Low. When V
– RTC Chip-Select Input; Active Low. The chip select signal must be asserted low during a bus
– RTC Write Input; Active Low. The
– Interrupt Request Output; Open Drain, Active Low. The
– Power-On Output; Open-Drain, Active Low. The
– Auxiliary battery input required for kickstart and wake-up features. This input also supports
– RAM Clear Input; Active Low. If enabled by software, taking
RCLR
BAUX
IRQ
has an internal pullup and should not be connected to an external pullup resistor.
must be present and auxiliary-battery-enable bit (ABE) must be set to 1 if the kickstart
BAUX
pin, the application software must clear all enabled flag bits contributing to
must be held between +2.5V and +5.2V. If V
KS
pin must be pulled up to the V
BAT
PWR
is at lower voltage or is not present. A standard +3V lithium cell or
CC
can be controlled by bits in the Dallas registers. The
voltage removed from the DS17885/DS17887,
IRQ
CC
WR
CS
bus. The
is removed from the DS17885/DS17887, the system can
IRQ
signal is an active low signal. The
must be kept in the active state during
4 of 38
BAUX
level is in the high-impedance state. Multiple
KS
IRQ
RCLR
BAUX
must be held between +2.5V and +3.7V. For
pin or from a wake-up interrupt. Once the
pin is an open-drain output and requires an
KS
PWR
supply. While V
can be activated whether or not V
pin, as might be generated from a key
BAUX
pin is intended for use as an on/off
IRQ
is not going to be used it should
pin is an active low output of
RCLR
CC
IRQ
CS
is applied, the
CC
output remains low
low results in the
WR
latches addresses.
+ 0.2V.
signal defines
RD
PWR
IRQ
PWR
and
’s active
KS
can be
CC
WR
pin
pin
is