DS1610 Dallas Semiconducotr, DS1610 Datasheet - Page 2

• Manufacturer Part Number: DS1610
• Description: Partitioned NV Controller
• Manufacturer: Dallas Semiconducotr

OPERATION - DISABLE PIN CONNECTED TO V
The DS1610 performs five circuit functions required to battery backup a RAM. First, a switch is provided
to direct power from the battery or the incoming power supply (V
switch has a voltage drop of less than 0.2 volts. The second function provided by the DS1610 is power-
fail detection. The incoming supply (V
tolerance a precision comparator detects power failure and inhibits both the chip enable output (
the write enable output (
chip enable output
tolerance. If
is brought high again. However,
if
brought high or 1.5 µs elapses. The delay of write protection until the current memory cycle is complete
prevents corrupted data. Power-fail detection occurs in the range of 4.75 to 4.5 volts with the tolerance
pin TOL grounded. If the tolerance pin is connected to V
of 4.5 volts to 4.25 volts. The
conditions. During nominal supply conditions
fourth function which the DS1610 performs is a battery status warning so that potential data loss is
avoided. Each time V
during battery backup no switch occurred from one battery to the other, the voltage of the battery
supplying power when V
enable cycle after power is applied is inhibited. If any switch from one battery to another did occur the
voltage of both batteries is checked. If either voltage is less than 2.0 volts the second chip enable cycle
will be inhibited. Battery status can therefore be determined by performing a read cycle after power up to
any location in memory, verifying that memory location’s contents. A subsequent write cycle can then be
executed to the same memory location altering the data. If the next read cycle fails to verify the written
data then the data is in danger of being corrupted. The fifth function of the DS1610 provides for battery
redundancy. When data integrity is extremely important it is wise to use two batteries to insure reliability.
The DS1610 controller provides an internal isolation switch which allows the connection of two batteries.
When entering battery backup operation, the battery with the highest voltage is selected for use. If one
battery should fail, the other would then supply energy to the connected load. The switch to a redundant
battery is transparent to circuit operation and to the user. In applications where battery redundancy is not
a major concern a single battery should be connected to the BAT1 pin. The BAT2 battery pin must be
grounded. When batteries are first connected to one or both of the V
battery potential until V
OPERATION - WRITE PROTECTION PROGRAMMING MODE
When the disable pin is connected to V
earlier with the addition of a partition switch which selectively write protects blocks of memory. The state
of the
maintains its configuration during power loss. If the strobed value of
resistor on the
discharge. The register controlling the partition switch is selected by recognition of a specific binary
pattern which is sent on address lines A
address lines being sent to RAM. The pattern is sent by 20 consecutive read cycles with the exact pattern
as shown in Table 1. Pattern matching must be accomplished using read cycles; any write cycles will
reset the pattern matching circuitry. If this pattern is matched perfectly, then the 21
cycle will load the partition switch. Since there are 16 possible write protected partitions, the size of each
partition is determined by the size of the memory. For example, a 128k X 8 memory would be divided
into 16 partitions of 128k/16 or 8k X 8. Each partition is represented by one of the 16 bits contained in the
WEI
is low at the time that power fail detection occurs, the
DIS
pin is strobed and latched as V
CEI
DIS
is low at the time that power-fail detection occurs the
pin will be disconnected in the power-fail state to eliminate the possibility of battery
CEO
CCI
CCI
WEO
is applied to the device battery status is checked with a precision comparator. If
and write enable output
CCI
is applied and removed for the first time.
is applied is checked. If this voltage is less than 2.0 volts the second chip
). A third function of write protection is accomplished by holding both the
PF0
CEO
signal is driven low and remains low until V
is forced high after 1.5 µs regardless of the state of
CCI
W
CCI
or V
-A
) is constantly monitored. When the supply goes out of
CCI
Z
. These address lines are normally the four upper order
CEO
CCO
2 of 10
crosses the power-fail trip point so that the DS1610
WEO
, the DS1610 performs all of the functions described
will follow
to within 0.2 volts of V
CCO
then power-fail detection occurs in the range
WEO
CCO
CCI
CEI
) depending on which is greater. This
signal will remain low until
DIS
and
BAT
CEO
is a high the internal pulldown
pins V
WEO
signal is kept low until
CCO
will follow
CCO
CCI
when V
st
returns to nominal
will not show the
through 24
CEI
CCI
. Similarly,
WEI
CEO
is out of
DS1610
WEI
th
. The
) and
read
CEI
is