UPD78F9418A NEC, UPD78F9418A Datasheet - Page 200
UPD78F9418A
Manufacturer Part Number
UPD78F9418A
Description
(UPD7894xxA) 8-Bit Single Chip Microcontrollers
Manufacturer
NEC
Datasheet
1.UPD78F9418A.pdf
(319 pages)
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200
BRGC00
Symbol
(c)
TPS003 TPS002 TPS001 TPS000
TPS003
Other than above
Baud rate generator control register 00 (BRGC00)
BRGC00 is set using an 8-bit memory manipulation instruction.
RESET input sets BRGC00 to 00H.
Cautions 1. When BRGC00 is written during a communication operation, the output of the
Remarks 1. f
If the internal clock is used as the serial clock for the 3-wire serial I/O mode, set the TPS000 to
TPS003 bits to set the frequency of the serial clock. To obtain the frequency to be set, use the
following formula. When the serial clock is input from off-chip, setting BRGC00 is unnecessary.
7
0
0
0
0
0
0
0
0
TPS002
6
0
0
0
0
1
1
1
1
f
n: Value in the above table that is determined in the settings of TPS000 to TPS003 (1 ≤ n ≤ 8)
X
: Main system clock oscillation frequency
2. Do not select n = 1 during f
2. n: Value in the above table that is determined in the settings of TPS000 to TPS003 (1 ≤
3. The parenthesized values apply to operation at f
Serial clock frequency =
TPS001
5
0
0
1
1
0
0
1
1
baud rate generator is disrupted and communications cannot be performed
normally. Be sure not to write to BRGC00 during a communication operation.
exceeded.
X
: Main system clock oscillation frequency
TPS000
n ≤ 8)
4
0
1
0
1
0
1
0
1
Setting prohibited
f
f
f
f
f
f
f
f
X
X
X
X
X
X
X
X
CHAPTER 13 SERIAL INTERFACE 00
/2
/2
/2
/2
/2
/2
/2
/2
3
0
2
3
4
5
6
7
8
(2.5 MHz)
(1.25 MHz)
(625 kHz)
(313 kHz)
(156 kHz)
(78.1 kHz)
(39.1 kHz)
(19.5 kHz)
User’s Manual U13952EJ3V0UD
2
0
2
f
n + 1
X
1
0
[Hz]
3-bit counter source clock selection
X
0
0
= 5.0 MHz operation because the baud rate rating is
Address
FF73H
X
= 5.0 MHz.
After reset
00H
R/W
R/W
n
1
2
3
4
5
6
7
8
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