LM3S600 Bookham Technology, Inc., LM3S600 Datasheet - Page 72

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LM3S600

Manufacturer Part Number
LM3S600
Description
Microcontroller
Manufacturer
Bookham Technology, Inc.
Datasheet

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System Control
Clock Verification Clear (CLKVCLR)
Base 0x400F.E000
Offset 0x150
Type R/W, reset 0x0000.0000
72
Reset
Reset
Type
Type
Bit/Field
31:1
0
RO
RO
31
15
0
0
Register 11: Clock Verification Clear (CLKVCLR), offset 0x150
This register is provided as a means of clearing the clock verification circuits by software. Since the
clock verification circuits force a known good clock to control the process, the controller is allowed
the opportunity to solve the problem and clear the verification fault. This register clears all clock
verification faults. To clear a clock verification fault, the VERCLR bit must be set and then cleared
by software. This bit is not self-clearing.
RO
RO
30
14
0
0
VERCLR
reserved
Name
RO
RO
29
13
0
0
RO
RO
28
12
0
0
RO
RO
Type
27
11
R/W
0
0
RO
RO
RO
26
10
0
0
Reset
0
0
RO
RO
25
0
9
0
Preliminary
reserved
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Clock Verification Clear
Clears clock verification faults.
RO
RO
24
0
8
0
reserved
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
RO
RO
19
0
3
0
RO
RO
18
0
2
0
October 01, 2007
RO
RO
17
0
1
0
VERCLR
R/W
RO
16
0
0
0

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