DSP101 Burr-Brown Corporation, DSP101 Datasheet - Page 15
![no-image](/images/no-image-200.jpg)
DSP101
Manufacturer Part Number
DSP101
Description
DSP-Compatible Sampling Single/Dual ANALOG-TO-DIGITAL CONVERTERS
Manufacturer
Burr-Brown Corporation
Datasheet
1.DSP101.pdf
(22 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSP101JP
Manufacturer:
Honeywell
Quantity:
1
used, but the resistor should not exceed 200 , or the output
settling time of the signal conditioning amplifier may be too
long.
EXTERNAL ADJUSTMENTS
All of the specifications for the DSP101 and DSP102, plus
the typical performance curves, are based on the perfor-
mance of these A/Ds without external trims. In most appli-
cations, external trims are not required.
OFFSET ADJUST
Where required by specific applications, offsets can be ad-
justed using the circuit of Figure 8. When not adjusted, VOS
(pin 4) on the DSP101, and VOSA (pin 4) and VOSB (pin 23)
on the DSP102, should be left open. If these pins are con-
nected to traces on the board, they should be bypassed to
ground with 0.01 F capacitors, as close as possible to the A/D.
To trim offset, one alternative is to ground the analog input
while converting continually. Then adjust the trimpot (on
VOS for the DSP101, on VOSA and VOSB for the DSP102)
until the output code is toggling between the codes FFFF and
0000 (Hex) at the 16-bit level (3FFFF and 00000 at the
FIGURE 10. A Complete Eight-Channel Analog Input System Using the DSP202 and the HI-508A.
NOTE: (1) Must be low source impedance
with unused inputs tied to ground.
Convert Command
(Positive Edge Triggered)
6
5
4
3
9
D
CLK
C
B
A
LD
12
11
10
15
2
4
5
6
7
9
CO
ET
In
In
In
In
In
In
In
In
10
1
2
3
4
5
6
7
8
QD
QC
QB
QA
EP
HI-508A
CL
74HC163
7
11
12
13
14
1
Out
EN
A
A
A
0
1
2
+5V
8
2
1
16
15
+5V
3
2
9
8
7
6
5
4
3
2
OPA627
8D
7D
6D
5D
4D
3D
2D
1D
74HC574
CLK
11
OE
7Q
6Q
5Q
4Q
3Q
2Q
1Q
8Q
1
6
12
13
14
15
16
17
18
19
15
150
R
18-bit level.) This will center the offset at 1/2 LSB below
0V, which is respectively –42 V or –10 V at the 16- and
18-bit levels.
The offset can also be adjusted by providing a sine wave to
the A/D input. Using FFT, or even simple averaging of
several thousand conversion results at a time, the trimpots
can be adjusted until there is no DC offset of the signal.
Grounding the input, or providing the sine wave, as far in
front of the A/D as possible allows offset from intervening
signal conditioning components to be also corrected by this
procedure.
MSB ADJUST
In most applications, adjustment of the Most Significant Bit
weight will not be required. When not adjusted, MSB (pin 3)
on the DSP101, and MSBA (pin 3) and MSBB (pin 24) on
the DSP102, should be left open. If these pins are connected
to traces on the board, they should be bypassed to ground
with 0.01 F capacitors, as close as possible to the A/D.
MSB (pin 3) on the DSP101, and MSBA (pin 3) and MSBB
(pin 24) on the DSP102, are internally connected to a
resistor divider network that is used to laser-trim the weight
220pF
1
C
1
14
12
11
10
15
5
5
4
4
3
2
1
H
G
F
E
D
C
B
A
SI
S/L
CLK
74HC166
7
CI
6
CL
12
QH
2
9
VIN
SSF
13
+5V
DSP101
4.7k
CONV
SOUT
SYNC
+5V
XCLK
DSP101/102
TAG
21
20
18
16
15
2
1
R
2
B
A
R/C
1000pF
Serial Data Out
15
C
CL
4
3
CE
14
Q
Q
+5V
74HC221
13
4
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