87C749 Philips Semiconductors, 87C749 Datasheet
87C749
Related parts for 87C749
87C749 Summary of contents
Page 1
... OTP/ROM, 5 channel 8-bit A/D, PWM, low pin count Preliminary specification Supersedes data of 1998 Jan 06 IC20 Data Handbook INTEGRATED CIRCUITS 1998 Apr 23 ...
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... RAM, 21 I/O lines, a 16-bit auto-reload counter/timer, a fixed-priority level interrupt structure, an on-chip oscillator, a five channel multiplexed 8-bit A/D converter, and an 8-bit PWM output. The EPROM version of this device, the 87C749, is available in plastic one-time programmable (OTP) packages. Once the array has been programmed functionally equivalent to the masked ROM 83C749 ...
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... STACK POINTER TMP2 TMP1 ALU PCON IE TH0 TL0 RTH RTL PSW INTERRUPT AND TIMER BLOCKS PORT 1 PORT 3 LATCH LATCH PORT 1 PORT 3 DRIVERS DRIVERS P1.0–P1.7 CC P3.0–P3.7 3 Preliminary specification 83C749/87C749 ROM/ EPROM PROGRAM ADDRESS REGISTER BUFFER TCON PC INCRE- MENTER PROGRAM COUNTER DPTR SU00305 ...
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... Function Pin Function 1 P3.4/A4 15 P1.2/ADC2/D2 2 P3.3/A3 16 P1.3/ADC3/D3 3 P3.2/A2/A10 17 P1.4/ADC4/D4 4 P3.1/A1/ P3.0/A0/ P0.2/V 20 P1.5/INT0/ P0.1/OE-PGM 21 P1.6/INT1/D6 8 P0.0/ASEL 22 P1.7/T0/D7 9 RST 23 P0 P0.4/PWM OUT P3.7/ P3.6/ P1.0/ADC0/D0 27 P3.5/A5 14 P1.1/ADC1/ 1998 Apr SU00304 4 Preliminary specification 83C749/87C749 ...
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... Port 3 also functions as the address input for the EPROM memory location permits a power-on RESET using only an external capacitor (reference input) cannot differ from Preliminary specification 83C749/87C749 ). Port 1 also applied for programming PP by more than 0.2V, and must be ...
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... P0.1, and P0.2) have open drain output structures. The alternate function for port P0.4 is PWM output. If the alternate function PWM is not being used, then this pin may be used as an I/O port. Port 2 Data Data 6 Preliminary specification 83C749/87C749 000 003 00B 013 01B 02B 033 ...
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... EX0 READ LATCH V DD INTERNAL PULL-UP INT. BUS P1.X PIN WRITE TO LATCH READ PIN Figure 1. Port Bit Latches and I/O Buffers 7 Preliminary specification 83C749/87C749 Pin INT0 Counter/timer flag 0 Pin INT1 PWM Timer I ADC 0003H 000BH 0013H 001BH 002BH 0033H LSB ETI — EPWM ...
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... The conversion requires 40 machine cycles ( 12MHz oscillator frequency). The A/D converter is controlled by the A/D control register, ADCON. Input channels are selected by the analog multiplexer by bits ADCON.0 through ADCON.2. The ADCON register is not bit addressable. 1998 Apr 23 83C749/87C749 ADCON Register MSB X X ENADC ADCI ...
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... – – 0 TIRUN – – – CLRTI TIRUN – GATE C IE0 9 Preliminary specification 83C749/87C749 must be CC RESET LSB VALUE 00H 00H AADR2 AADR1 AADR0 C0H 00H 00H 00H EX1 ET0 EX0 00H ...
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... It is generally expressed in LSBs or in percent of FSR. 10 Preliminary specification 83C749/87C749 To Comparator C C SU00199 . ...
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... The TF bit in special function register TCON is set on counter overflow and, if the interrupt is enabled, will generate an interrupt (see Figure 3 RTL RTH Figure 3. 83C749 Counter/Timer Block Diagram RATING –65 to +150 –0.5 to +6.5 –0 –0 13.0 11 Preliminary specification 83C749/87C749 TF Int. Reload SU00300 UNIT 0 1 ...
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... Input leakage current, port 0.0, 0.1 and 0 Reset pull-down resistor RST C Pin capacitance Power-down current program voltage (87C749 only Program current (87C749 only) PP Analog Inputs (A/D guaranteed only with quartz window covered Analog supply voltage CC AI Analog operating supply current CC ...
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... This spec.) 26mA 67mA ; X2, X1 n.c.; RST = 5ns, V CLCH CHCL 5ns, V CLCH CHCL 10 16MHz CLOCK MIN Preliminary specification 83C749/87C749 4 LIMITS 1 MIN TYP MAX UNIT 8 bits 1 LSB 1 LSB 0 LSB –60 dB unless otherwise 0.5V – ...
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... TYP ACTIVE MAX IDLE TYP IDLE I 4MHz 8MHz 12MHz 16MHz FREQ Figure 6. I vs. FREQ CC values taken 5.5V and worst case temperature Typical I values taken 5.0V and Preliminary specification 83C749/87C749 t CHCX SU00297 SU00307 SU00308 ...
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... The V signal may now be driven to the V PP 87C749 in the verify mode. (Port 1 is now used as an output port). After four machine cycles (48 clock periods), the contents of the addressed location in the EPROM array will appear on Port 1. The next programming cycle may now be initiated by placing the ...
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... USER EPROM and KEY arrays using serial data streams and logic levels on port pins indicated in Table 3. When programming either security bit not necessary to provide address or data information to the 87C749 on ports 1 and 3. Table 3. Implementing Program/Verify Modes OPERATION Program user EPROM ...
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... GHGL 98 s MIN 10 s MIN t HAHLD LOW ADDRESS ADSTA DVGL GHDX VALID DATA DATA TO BE PROGRAMMED PROGRAM MODE Figure 9. Program/Verify Cycle 17 Preliminary specification 83C749/87C749 DATA BUS SU00309 BIT 7 BIT 8 BIT 9 SU00302 5V t GHSL t AVQV INVALID DATA VALID DATA ...
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... Philips Semiconductors 80C51 8-bit microcontroller family 2K/64 OTP/ROM, 5 channel 8 bit A/D, PWM, low pin count DIP28: plastic dual in-line package; 28 leads (600 mil); long body 1998 Apr 23 83C749/87C749 18 Preliminary specification SOT117-2 ...
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... Philips Semiconductors 80C51 8-bit microcontroller family 2K/64 OTP/ROM, 5 channel 8 bit A/D, PWM, low pin count PLCC28: plastic leaded chip carrer; 28 leads; pedestal 1998 Apr 23 83C749/87C749 19 Preliminary specification SOT261-3 ...
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... Philips Semiconductors 80C51 8-bit microcontroller family 2K/64 OTP/ROM, 5 channel 8 bit A/D, PWM, low pin count SSOP28: plastic shrink small outline package; 28 leads; body width 5.3mm 1998 Apr 23 83C749/87C749 20 Preliminary specification SOT341-1 ...
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... Philips Semiconductors 80C51 8-bit microcontroller family 2K/64 OTP/ROM, 5 channel 8 bit A/D, PWM, low pin count 1998 Apr 23 83C749/87C749 NOTES 21 Preliminary specification ...
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... Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 1998 Apr 23 [1] Copyright Philips Electronics North America Corporation 1998 Document order number: 22 Preliminary specification 83C749/87C749 All rights reserved. Printed in U.S.A. Date of release: 05-98 9397 750 03856 ...