83C754 Philips Semiconductors, 83C754 Datasheet
83C754
Related parts for 83C754
83C754 Summary of contents
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... OTP/ROM, DAC, comparator, UART, reference Preliminary specification Supersedes data of 1997 Dec 03 IC20 Data Handbook INTEGRATED CIRCUITS 1998 Apr 23 ...
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... OTP/ROM, DAC, comparator, UART, reference DESCRIPTION The Philips 83C754/87C754 offers many of the advantages of the 80C51 architecture in a small package and at low cost. The 8XC754 Microcontroller is fabricated with Philips high-density CMOS technology. Philips epitaxial substrate minimizes CMOS latch-up senitivity ...
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... TMP2 TMP1 PCON TCON ALU IE TH0 TL0 TH1 TL1 PSW INTERRUPT, SERIAL PORT AND TIMER BLOCKS PORT 1 PORT 3 LATCH LATCH PORT 1 PORT 3 DRIVERS DRIVERS P1.0–P1.2 P3.0–P3.7 3 Preliminary specification 83C754/87C754 ROM/ EPROM PROGRAM ADDRESS REGISTER BUFFER PC INCRE- MENTER PROGRAM COUNTER DPTR SU00666D ...
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... Timer 1 external clock input. SS – Input which specifies verify mode (output enable) or the program mode. /PGM = 1 output enabled (verify mode). /PGM = 0 program mode. (reference input) cannot differ from Preliminary specification 83C754/87C754 ). applied for programming or PP under S/W control. by more than 0.2V, and must be CC ...
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... The data pointer (DPTR) consists of a high byte (DPH) and a low byte (DPL). In the 80C51 this register allows the access of external data memory using the MOVX instruction. Since the 83C754 does not support MOVX or external memory accesses, this register is generally used as a 16-bit offset pointer of the accumulator in a MOVC instruction ...
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... SMOD SMOD OSC OSC 20MHz X 20MHz 1 20MHz 1 11.059MHz 1 11.059MHz 0 11.059MHz 0 11.059MHz 0 11.059MHz 0 11.986MHz 0 6MHz 0 12MHz 0 6 Preliminary specification 83C754/87C754 SMOD 2 (Timer 1 Overflow Rate) 32 Oscillator Frequency SMOD [256 (TH1)] /32 OSC SU00120 Timer 1 C/T Mode Reload Value FFH 0 2 ...
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... The 8XC754 does not directly address any external data or program memory spaces. For this reason, the MOVX instructions in the 80C51 instruction set are not implemented in the 83C754, nor are the alternate I/O pin functions RD and WR. I/O Ports The I/O pins provided by the 8XC754 consist of port 1 and port 3. ...
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... Figure 4. Typical Port Bit Latches and I/O Buffers 1998 Apr 23 AC1 BANDGAP REF* AC2 AC3 AC4 1K DCON 7:0 (84H) AC6 ANALOG MUX BANDGAP REF MUX0 MUX1 MUX2 AC5 Figure 3. Analog Section V DD INTERNAL* PULL-UP PIN SU00671 8 Preliminary specification 83C754/87C754 20K 10K AC7 TO PCA TRIGGER EXT SU00765A ...
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... SM0 SM1 SM2 REN TB8 TF1 TR1 TF0 TR0 IE1 GATE C GATE Preliminary specification 83C754/87C754 RESET LSB VALUE 00H AC2 AC1 AC0 MUX2 MUX1 MUX0 00H TOG PWM ECCF x0000000B – – ...
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... CCAPL is reloaded with the value in CCAPH. This allows updating the PWM without glitches. The PWM and ECOM bits in the module’s CCAPM register must be set to enable the PWM mode. 16 BITS PCA MODULE Figure 5. Programmable Counter Array (PCA) 10 Preliminary specification 83C754/87C754 P1.1/CEX SU00672B ...
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... CF CR –– CCF –– Figure 6. PCA Timer/Counter CF CR –– CCF –– CCAPM ECCFn Figure 7. PCA Interrupt System 11 Preliminary specification 83C754/87C754 TO PCA MODULES OVERFLOW INTERRUPT CL CMOD CPS1 CPS0 ECF (D9H) CCON –– –– –– (D8H) ...
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... Figure 8. CMOD: PCA Counter Mode Register –– CCF –– –– Figure 9. CCON: PCA Counter Control Register 12 Preliminary specification 83C754/87C754 Reset Value = 00XX X000B CPS0 ECF OSC SU00675A Reset Value = 00X0 0000B –– –– ...
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... CCF) CAPTURE CAPP CAPN MAT TOG PWM Figure 12. PCA Capture Mode 13 Preliminary specification 83C754/87C754 Reset Value = X000 0000B PWM ECCF 1 0 SU00677A MODULE FUNCTION –– CCON (D8H) PCA INTERRUPT PCA TIMER/COUNTER CH CL CCAPH ...
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... CCF –– CCAPL (TO CCF4) MATCH CL ECOM CAPP CAPN MAT TOG 0 0 Figure 14. PCA High Speed Output Mode 14 Preliminary specification 83C754/87C754 CCON –– –– –– (D8H) PCA INTERRUPT PWM ECCF CCAPM 0 0 SU00679A CCON –– –– ...
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... CCAPH CCAPL MATCH 16–BIT COMPARATOR CH CL PCA TIMER/COUNTER –– ECOM CAPP CAPN MAT Figure 16. PCA Watchdog Timer 15 Preliminary specification 83C754/87C754 0 CEX 1 ECCF CCAPM 0 SU00681A CMOD CPS1 CPS0 ECF (D9H) RESET CCAPM TOG PWM ECCF (DEH) X ...
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... CC (83C754 12 10 amb V = 13.0V PP 10mA 26mA 67mA ; X2, X1 n.c.; RST = 5ns CLCH CHCL 5ns, V CLCH CHCL 16 Preliminary specification 83C754/87C754 UNIT 0 LIMITS UNIT UNIT 1 TYP MAX V 0.2V –0.1 CC +0 0.45 V ...
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... TEST CONDITIONS TEST CONDITIONS AC0 = 0 IC only AC0 = 1 Stability requirement 100Hz step change CC Q1 off, 330 sensor 0.04V 4 4 4 4 4 Preliminary specification 83C754/87C754 4 LIMITS UNIT UNIT 1 MIN TYP MAX 4.5 – 5.5 V 330 – 3K – 0.88 1.5 mA – – 3.6 3.8 4.0 ...
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... Apr 16MHz CLOCK MIN CLCX 0 0.9 CC – 0 CLCH CHCL t CLCL Figure 17. External Clock Drive 0 0.9 CC 0.2 V – 0.1 CC Figure 18. AC Testing Input/Output 18 Preliminary specification 83C754/87C754 VARIABLE CLOCK MAX MIN MAX UNIT 3.5 16 MHz CHCX SU00297 SU00307 ...
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... OTP/ROM, DAC, comparator, UART, reference I CC Maximum I Notes 6 and 7 refer to AC Electrical Characteristics. ROM CODE SUBMISSION When submitting ROM code for the 83C754, the following must be specified byte user ROM data 2. 64 byte ROM encryption key 3. ROM security bits. ADDRESS CONTENT ...
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... PP Security bit 2, the verify inhibit bit, prevents verification of both the USER EPROM array and the encryption key arrays. The security bit levels may still be verified. 20 Preliminary specification 83C754/87C754 level, placing the OH voltage level, providing the byte back down to the V level and verifying the ...
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... Exposing the EPROM to an ultraviolet lamp of 12,000uW/cm for minutes distance of about 1 inch, should be sufficient. Erasure leaves the array in an all 1s state. SERIAL CODE 296H 296H 292H 292H 29AH 298H 29AH . 21 Preliminary specification 83C754/87C754 rating PGM V PP – – ...
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... CLCL 2t CLCL 13t CLCL 13t CLCL . PP is 14t maximum. AVQV CLCL 87C754 A0–A10 ZDAC/ASEL XYDACBIAS/PGM P1.2/V PP P3.0–P3.7 X1 RESET CONTROL RST LOGIC Figure 20. Programming Configuration 22 Preliminary specification 83C754/87C754 MAX UNIT 16 MHz CLCL s s 110 s 48t CLCL s + DATA BUS SU00667A ...
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... PULSES t GLGH t GHGL 98 s MIN 10 s MIN t HAHLD LOW ADDRESS ADSTA DVGL GHDX VALID DATA DATA TO BE PROGRAMMED PROGRAM MODE Figure 22. Program/Verify Cycle 23 Preliminary specification 83C754/87C754 BIT 7 BIT 8 BIT 9 SU00721 5V t GHSL t AVQV INVALID DATA VALID DATA VERIFY MODE SU00683A ...
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... Philips Semiconductors 80C51 8-bit microcontroller family 4K/256 OTP/ROM, DAC, comparator, UART, reference SSOP28: plastic shrink small outline package; 28 leads; body width 5.3mm 1998 Apr 23 83C754/87C754 24 Preliminary specification SOT341-1 ...
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... Philips Semiconductors 80C51 8-bit microcontroller family 4K/256 OTP/ROM, DAC, comparator, UART, reference 1998 Apr 23 83C754/87C754 NOTES 25 Preliminary specification ...
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... Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 1998 Apr 23 [1] Copyright Philips Electronics North America Corporation 1998 Document order number: 26 Preliminary specification 83C754/87C754 All rights reserved. Printed in U.S.A. Date of release: 05-98 9397 750 03892 ...