83C748 Philips Semiconductors, 83C748 Datasheet - Page 7

no-image

83C748

Manufacturer Part Number
83C748
Description
80C51 8-bit microcontroller family 2K/64 OTP/ROM/ low pin count
Manufacturer
Philips Semiconductors
Datasheet
Philips Semiconductors
OSCILLATOR CHARACTERISTICS
X1 and X2 are the input and output, respectively, of an inverting
amplifier which can be configured for use as an on-chip oscillator.
To drive the device from an external clock source, X1 should be
driven while X2 is left unconnected. There are no requirements on
the duty cycle of the external clock signal, because the input to the
internal clock circuitry is through a divide-by-two flip-flop. However,
minimum and maximum high and low times specified in the data
sheet must be observed.
RESET
A reset is accomplished by holding the RST pin high for at least two
machine cycles (24 oscillator periods), while the oscillator is running.
To insure a good power-up reset, the RST pin must be high long
enough to allow the oscillator time to start up (normally a few
milliseconds) plus two machine cycles. At power-up, the voltage on
V
IDLE MODE
In idle mode, the CPU puts itself to sleep while all of the on-chip
peripherals stay active. The instruction to invoke the idle mode is the
last instruction executed in the normal operating mode before the
1999 Apr 15
CC
80C51 8-bit microcontroller family
2K/64 OTP/ROM, low pin count
and RST must come up at the same time for a proper start-up.
Maximum I
I
Notes 5 and 6 refer to DC Electrical Characteristics.
CC
Typical I
CC
(mA)
values taken at V
22
20
18
16
14
12
10
CC
8
6
4
2
values taken at V
Figure 2. I
4MHz
CC
8MHz
CC
7
FREQ
max and worst case temperature.
vs. FREQ
idle mode is activated. The CPU contents, the on-chip RAM, and all
of the special function registers remain intact during this mode. The
idle mode can be terminated either by any enabled interrupt (at
which time the process is picked up at the interrupt service routine
and continued), or by a hardware reset which starts the processor in
the same manner as a power-on reset.
POWER-DOWN MODE
In the power-down mode, the oscillator is stopped and the
instruction to invoke power-down is the last instruction executed.
Only the contents of the on-chip RAM are preserved. A hardware
reset is the only way to terminate the power-down mode. the control
bits for the reduced power modes are in the special function register
PCON.
Table 1.
Idle
Power-down
CC
12MHz
= 5.0V and 25 C.
MODE
16MHz
MAX ACTIVE I
TYP ACTIVE I
MAX IDLE I
TYP IDLE I
External Pin Status During Idle and
Power-Down Modes
SU00298
CC
CC
CC
6
CC
6
Port 0
5
5
Data
Data
83C748/87C748
Port 1
Data
Data
Preliminary specification
Port 2
Data
Data

Related parts for 83C748