83C152JD Intel Corporation, 83C152JD Datasheet - Page 7

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83C152JD

Manufacturer Part Number
83C152JD
Description
UNIVERSAL COMMUNICATION CONTROLLER 8-BIT MICROCONTROLLER
Manufacturer
Intel Corporation
Datasheet
OSCILLATOR CHARACTERISTICS
XTAL1 and XTAL2 are the input and output respec-
tively of an inverting amplifier which can be config-
ured for use as an on-chip oscillator as shown in
Figure 3
To drive the device from an external clock source
XTAL1 should be driven while XTAL2 is left uncon-
nected as shown in Figure 4 There are no require-
ments on the duty cycle of the external clock signal
since the input to the internal clocking circuitry is
through a divide-by-two flip-flop but minimum and
maximum high and low times specified on the Data
Sheet must be observed
An external oscillator may encounter as much as a
100 pF load at XTAL1 when it starts-up This is due
to interaction between the amplifier and its feedback
capacitance Once the external signal meets the V
and V
ceed 20 pF
80C152JA 83C152JA 80C152JC 83C152JC
80C152JB 80C152JD
NOTE
For more detailed information on the reduced power modes refer to the Embedded Controller Handbook and Application
Note AP-252 ‘‘Designing with the 80C51BH ’’
Idle
Idle
Power Down
Power Down
Note difference of logic level of PSEN during Power Down for ROM JA JC and ROM emulation mode for JC JD
Idle
Idle
Power Down
Power Down
Mode
Mode
Figure 3 Using the On-Chip Oscillator
IH
specifications the capacitance will not ex-
Instruction
Table 3 Status of the External Pins During Idle and Power Down Modes
P0 P2
P5 P6
P0 P2
P5 P6
Bus
Program
Memory
External
External
Internal
Internal
ALE PSEN EPSEN Port 0 Port 1
1
1
0
0
ALE
1
1
0
0
1
1
1
0
270431 –5
PSEN
1
1
1
0
0
1
1
0
IL
Float
Float
Data
Data
www.DataSheet4U.com
Port 0
Float
Float
Data
Data
IDLE MODE
In Idle Mode the CPU puts itself to sleep while most
of the on-chip peripherals remain active The major
peripherals that do not remain active during Idle are
the DMA channels The Idle Mode is invoked by
software The content of the on-chip RAM and all
the Special Function Registers remain unchanged
during this mode The Idle Mode can be terminated
by any enabled interrupt or by a hardware reset
POWER DOWN MODE
In Power Down Mode the oscillator is stopped and
all on-chip functions cease except that the on-chip
RAM contents are maintained The mode Power
Down is invoked by software The Power Down
Mode can be terminated only by a hardware reset
Data
Data
Data
Data
Port 1
Data
Data
Data
Data
Address
Figure 4 External Clock Drive
Port 2
Data
Data
Data
Address
Port 3 Port 4 Port 5
Data
Data
Data
Data
Port 2
Data
Data
Data
8XC152JA JB JC JD
Data
Data
Data
Data
Port 3
Data
Data
Data
Data
0FFH
0FFH Address
0FFH
0FFH
270431 –6
Port 4
Port 6
Data
Data
Data
Data
0FFH
0FFH
0FFH
7

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