PDSP16515AA0AC Mitel Networks Corporation, PDSP16515AA0AC Datasheet
PDSP16515AA0AC
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PDSP16515AA0AC Summary of contents
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Features Completely self contained FFT Processor Pin and functionally compatible with the PDSP16510A Expanded width internal RAM supports up to 1024 complex points 18 bit internal data bus with block floating point arithmetic for increased dynamic range 500 MIP operation ...
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PDSP16515A SAMPLE CLOCK ANALOG A/D INPUT Figure. 2. Typical 256 Point Real Only System Performing Continuous Transforms 2 DATA INPUT 3 TERM WINDOW OPERATOR COEFFICIENT WORKSPACE WORKSPACE ROM RAM FOUR DATA PATHS RESULT OUPUT Figure. 1. Block Diagram DIS DOS ...
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N D9 D10 D12 D14 DIS M D8 D11 D13 D15 GND LFLG F VDD ...
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PDSP16515A SIGNAL TYPE DESCRIPTION D15:0 I Data input during real only mode. The real component in complex data mode. AUX15:0 I When DEF is active AUX15:0 are used to define the operating mode as defined in Table 3. When DEF ...
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No external ROM is needed to support these windows. The Blackman-Harris window gives improved dynamic range over the Hamming window when two closely spaced frequencies ...
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PDSP16515A subsequent passes a Control Register Bit allows the user to continue to select these 18 bits, or instead to use the 18 most significant bits. The latter option is equivalent bit word growth. The 2 or ...
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The internal workspace is double buffered when 256 point transforms are to be performed. A separate output buffer is also provided. These resources, together with separate input and output buses, allow new data to be loaded and old results to ...
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PDSP16515A is defined below where Ø MHz and L is the system clock low time in nanoseconds : S = FØ, where (6+0.001Ø typically 0.66 and applies to all transforms except for ...
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The active going LFLG edge does not normally have any system significance, but in the block overlapping modes the in-active going edge will occur when 50% or 75% of the data has been loaded. By driving the INEN input on ...
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PDSP16515A When continuously transforming data such that new outputs are internally available before the previous block has been completely dumped, then DAV would normally stay active and give no indication that one block dump had been finished and another block ...
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DAV DEN T PS Dummy Strobes DOS (1) (2) (3) Un-defined DATA O S3:0 Un-defined In this zone SCLK and DOS requirements have to be met - See "User Notes - stopping DOS" Characteristic DEN Set Up Time ...
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PDSP16515A Valid transformed data is actually available within the device from DAV going active until INEN again goes active, and a new set of data is loaded. The output tristate drivers, however, normally go high impedance when DAV goes in-active ...
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The output of the FIFO must provide data for the real inputs. Continuous inputs can still be accepted, and each block will initially occur on the imaginary inputs, and then occur again on the real inputs as an output from ...
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PDSP16515A The maximum sampling rates given in Table 5 allow for the extra dumping time. The load and dump operations are not concurrent with transforms in the 1024 point modes, and an external input buffer will be needed if loss ...
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Without the feedback from the last device, the first device would wait for another externally supplied initialising pulse. In such a system with N devices in parallel, then N continuous transforms must be executed before the first device can wait ...
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PDSP16515A DEF DIS / DOS INTERNAL START INEN A LFLG A DAV A INEN B LFLG B DAV B Figure 8. Three Device System with Separate Load, Transform, and Dump Operations In this operating mode the DIS and DOS strobes ...
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The number of devices, N, needed to achieve a given sample rate can be derived from the following formula: NnS > for no overlapping NnS > [ for 50% ...
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PDSP16515A BITS 5:4 These bits define the choice of window operator. If other windows are needed they must be applied externally. The fourth option is used to specify the inverse transform, which does not require the use of a window ...
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BIT 14:13 These bits allow four dump size options to be provided. Individual frequency bins are not accessible. BIT 15 Under normal circumstances DAV would be expected to go invalid when a transform has been dumped. In some applications, however, ...
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PDSP16515A Overall loss An overall figure for the reduction in signal to noise ratio can be obtained by adding the mid-point loss to the reciprocal of the equivalent noise power bandwidth in dB measure of the ability ...
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Arithmetic Accuracy Max Tone WRT Noise 16 bit,unconditional 60 scaling 24 bit arithmetic with unconditional scaling bit inputs 16 bit inputs with 85 PDSP16515A block FP Full 32 bit Floating point with 16 bit inputs 93 Table 8. ...
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PDSP16515A (a) 2 cycles in every 12 are dedicated to reading new information in the input buffer and writing it to the RAM. (b) 2 cycles in every 12 are dedicated to reading the contents of the RAM and advancing ...
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DOS can now be switched on for at least one pulse (but may be more), and the sequence of events as described earlier (from point No 3.3) will start. DEN can then be made active, whereby a further 4 DEN-Enabled ...
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PDSP16515A Absolute Maximum Ratings [See Notes] Supply voltage Vcc Input voltage V IN Output voltage V OUT Clamp diode current per pin I (see note 2) K Static discharge voltage (HMB) Storage temperature T S Junction Temperature, Commercial Junction temperature, ...
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